Messages in this thread | | | Date | Wed, 28 Dec 2022 15:36:27 +0100 | From | "Luca Weiss" <> | Subject | Re: [PATCH v3 2/3] phy: qcom-qmp-combo: Add config for SM6350 |
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Hi Johan,
On Wed Dec 28, 2022 at 3:17 PM CET, Johan Hovold wrote: > Luca, Vinod, > > On Wed, Nov 30, 2022 at 09:14:28AM +0100, Luca Weiss wrote: > > Add the tables and config for the combo phy found on SM6350. > > > > Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> > > --- > > Changes since v2: > > * Drop dp_txa/dp_txb changes, not required > > * Fix dp_dp_phy offset > > > > drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 126 ++++++++++++++++++++++ > > 1 file changed, 126 insertions(+) > > > > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c > > index 77052c66cf70..6ac0c68269dc 100644 > > --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c > > +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c > > > @@ -975,6 +1039,19 @@ static const char * const sc7180_usb3phy_reset_l[] = { > > "phy", > > }; > > > > +static const struct qmp_combo_offsets qmp_combo_offsets_v3 = { > > + .com = 0x0000, > > + .txa = 0x1200, > > + .rxa = 0x1400, > > + .txb = 0x1600, > > + .rxb = 0x1800, > > + .usb3_serdes = 0x1000, > > + .usb3_pcs_misc = 0x1a00, > > + .usb3_pcs = 0x1c00, > > + .dp_serdes = 0x1000, > > I would have expected this to be 0x2000 as that's what the older > platforms have been using for the dp serdes table so far. Without access > to any documentation it's hard to tell whether everyone's just been > cargo-culting all along or if there's actually something there at offset > 0x2000.
From what I saw comparing downstream code vs mainline 0x1000 should be correct.
From https://gerrit-public.fairphone.software/plugins/gitiles/kernel/msm-4.19/+/refs/heads/kernel/11/fp4/include/dt-bindings/phy/qcom,lagoon-qmp-usb3.h#38
USB3_DP_QSERDES_COM_BIAS_EN_CLKBUFLR_EN (downstream 0x1034) = QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN (mainline 0x034)
USB3_DP_QSERDES_COM_CP_CTRL_MODE0 (downstream 0x1060) = QSERDES_V3_COM_CP_CTRL_MODE0 (mainline 0x060)
These defines downstream are used in qcom,qmp-phy-init-seq (lagoon-usb.dtsi) which super abbreviated gets used like this:
lagoon-usb.dtsi: reg = <0x88e8000 0x3000>; reg-names = "qmp_phy_base"; qcom,qmp-phy-init-seq = <...>;
drivers/usb/phy/phy-msm-ssusb-qmp.c res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "qmp_phy_base"); phy->base = devm_ioremap_nocache(dev, res->start, resource_size(res));
of_property_read_u32_array(dev->of_node, "qcom,qmp-phy-init-seq", phy->qmp_phy_init_seq, phy->init_seq_len);
reg = (struct qmp_reg_val *)phy->qmp_phy_init_seq;
while (reg->offset != -1) { writel_relaxed(reg->val, phy->base + reg->offset);
I don't see anywhere where an extra 0x1000 should come from. But perhaps I'm missing something. The reg address is the same downstream and mainline also.
> > Vinod, could you shed some light on this as presumably you have access > to some documentation?
That would be useful :)
Regards Luca
> > > + .dp_dp_phy = 0x2a00, > > +}; > > Johan
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