Messages in this thread | | | Date | Tue, 27 Dec 2022 20:58:32 +0000 | From | Conor Dooley <> | Subject | Re: [PATCH v3 6/7] riscv: dts: starfive: Add initial StarFive JH7110 device tree |
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On Sun, Dec 25, 2022 at 10:31:41PM +0800, Hal Feng wrote: > On Tue, 20 Dec 2022 21:31:43 +0000, Conor Dooley wrote: > > On Tue, Dec 20, 2022 at 09:12:46AM +0800, Hal Feng wrote: > > > From: Emil Renner Berthing <kernel@esmil.dk> > > > > > > Add initial device tree for the JH7110 RISC-V SoC by StarFive > > > Technology Ltd. > > > > > > Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> > > > Co-developed-by: Jianlong Huang <jianlong.huang@starfivetech.com> > > > Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com> > > > Co-developed-by: Hal Feng <hal.feng@starfivetech.com> > > > Signed-off-by: Hal Feng <hal.feng@starfivetech.com> > > > ---
> > > + gpio: gpio@13040000 { > > > > > + gpioa: gpio@17020000 { > > > > Out of curiousity, why gpio & gpioa? > > Oh, is it easier to read if I change "gpio" and "gpioa" > to "sysgpio" and "aongpio"? Thanks.
I think those would be more reader friendly, that's for sure.
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