Messages in this thread | | | Date | Thu, 22 Dec 2022 19:22:42 +0800 | Subject | Re: [PATCH v2 12/15] KVM: x86/vmx: Disable Arch LBREn bit in #DB and warm reset | From | Like Xu <> |
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On 25/11/2022 12:06 pm, Yang Weijiang wrote: > +static void disable_arch_lbr_ctl(struct kvm_vcpu *vcpu) > +{ > + struct lbr_desc *lbr_desc = vcpu_to_lbr_desc(vcpu); > + struct kvm_pmu *pmu = vcpu_to_pmu(vcpu); > + > + if (kvm_cpu_cap_has(X86_FEATURE_ARCH_LBR) && > + test_bit(INTEL_PMC_IDX_FIXED_VLBR, pmu->pmc_in_use) && > + lbr_desc->event) { > + u64 ctl = vmcs_read64(GUEST_IA32_LBR_CTL); > + > + vmcs_write64(GUEST_IA32_LBR_CTL, ctl & ~ARCH_LBR_CTL_LBREN); > + } > +} > + > static void vmx_inject_exception(struct kvm_vcpu *vcpu) > { > struct kvm_queued_exception *ex = &vcpu->arch.exception; > @@ -1738,6 +1752,9 @@ static void vmx_inject_exception(struct kvm_vcpu *vcpu) > vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, intr_info); > > vmx_clear_hlt(vcpu); > + > + if (ex->vector == DB_VECTOR) > + disable_arch_lbr_ctl(vcpu);
Please verify this with KUT testcase, once I failed and did not confirm if it is a hardware issue. Good Luck.
> }
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