Messages in this thread | | | Date | Tue, 20 Dec 2022 16:02:08 +0100 | Subject | Re: [PATCH resend] arm64: dts: mediatek: mt8192: Mark scp_adsp clock as broken | From | Matthias Brugger <> |
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On 30/11/2022 04:17, Chen-Yu Tsai wrote: > The scp_adsp clock controller is under the SCP_ADSP power domain. This > power domain is currently not supported nor defined. > > Mark the clock controller as broken for now, to avoid the system from > trying to access it, and causing the CPU or bus to stall. > > Fixes: 5d2b897bc6f5 ("arm64: dts: mediatek: Add mt8192 clock controllers") > Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> > --- > arch/arm64/boot/dts/mediatek/mt8192.dtsi | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > index 6b20376191a7..ef91941848ae 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > @@ -575,6 +575,8 @@ scp_adsp: clock-controller@10720000 { > compatible = "mediatek,mt8192-scp_adsp"; > reg = <0 0x10720000 0 0x1000>; > #clock-cells = <1>; > + /* power domain dependency not upstreamed */ > + status = "broken"; > }; > > uart0: serial@11002000 {
Looking into the DT spec, "broken" is no valid value. I suppose we want to have "fail" here.
Regards, Matthias
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