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SubjectRe: [PATCH V4 0/9] CXL: Process event logs
Jonathan Cameron wrote:
> On Sun, 11 Dec 2022 23:06:18 -0800
> ira.weiny@intel.com wrote:
>
> > From: Ira Weiny <ira.weiny@intel.com>
> >
> > This code has been tested with a newer qemu which allows for more events to be
> > returned at a time as well an additional QMP event and interrupt injection.
> > Those patches will follow once they have been cleaned up.
> >
> > The series is now in 3 parts:
> >
> > 1) Base functionality including interrupts
> > 2) Tracing specific events (Dynamic Capacity Event Record is defered)
> > 3) cxl-test infrastructure for basic tests
> >
> > Changes from V3
> > Feedback from Dan
> > Spit out ACPI changes for Bjorn
> >
> > - Link to v3: https://lore.kernel.org/all/20221208052115.800170-1-ira.weiny@intel.com/
>
> Because I'm in a grumpy mood (as my colleagues will attest!)...
> This is dependent on the patch that moves the trace definitions and
> that's not upstream yet except in cxl/preview which is optimistic
> place to use for a base commit. The id isn't the one below either which
> isn't in either mailine or the current CXL trees.

I do not want to commit to a new baseline until after -rc1, so yes this
is in a messy period.

> Not that I actually checked the cover letter until it failed to apply
> (and hence already knew what was missing) but still, please call out
> dependencies unless they are in the branches Dan has queued up to push.
>
> I just want to play with Dave's fix for the RAS errors so having to jump
> through these other sets.

Yes, that is annoying, apologies.

>
> Thanks,
>
> Jonathan
>
> >
> >
> > Davidlohr Bueso (1):
> > cxl/mem: Wire up event interrupts
> >
> > Ira Weiny (8):
> > PCI/CXL: Export native CXL error reporting control
> > cxl/mem: Read, trace, and clear events on driver load
> > cxl/mem: Trace General Media Event Record
> > cxl/mem: Trace DRAM Event Record
> > cxl/mem: Trace Memory Module Event Record
> > cxl/test: Add generic mock events
> > cxl/test: Add specific events
> > cxl/test: Simulate event log overflow
> >
> > drivers/acpi/pci_root.c | 3 +
> > drivers/cxl/core/mbox.c | 186 +++++++++++++
> > drivers/cxl/core/trace.h | 479 ++++++++++++++++++++++++++++++++++
> > drivers/cxl/cxl.h | 16 ++
> > drivers/cxl/cxlmem.h | 171 ++++++++++++
> > drivers/cxl/cxlpci.h | 6 +
> > drivers/cxl/pci.c | 236 +++++++++++++++++
> > drivers/pci/probe.c | 1 +
> > include/linux/pci.h | 1 +
> > tools/testing/cxl/test/Kbuild | 2 +-
> > tools/testing/cxl/test/mem.c | 352 +++++++++++++++++++++++++
> > 11 files changed, 1452 insertions(+), 1 deletion(-)
> >
> >
> > base-commit: acb704099642bc822ef2aed223a0b8db1f7ea76e
>

I think going forward these base-commits need to be something that are
reachable on cxl.git. For now I have pushed out a baseline for both Dave
and Ira's patches to cxl/preview which will rebase after -rc1 comes out.

Just the small matter of needing some acks/reviews on those lead in
patches so I can move them to through cxl/pending to cxl/next:

http://lore.kernel.org/r/167051869176.436579.9728373544811641087.stgit@dwillia2-xfh.jf.intel.com
http://lore.kernel.org/r/20221212070627.1372402-2-ira.weiny@intel.com

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