Messages in this thread | | | Date | Tue, 13 Dec 2022 10:37:47 +0530 | Subject | Re: [PATCH v2 08/13] arm64: dts: qcom: sm8250: Fix the base addresses of LLCC banks | From | Sai Prakash Ranjan <> |
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On 12/12/2022 6:03 PM, Manivannan Sadhasivam wrote: > The LLCC block has several banks each with a different base address > and holes in between. So it is not a correct approach to cover these > banks with a single offset/size. Instead, the individual bank's base > address needs to be specified in devicetree with the exact size. > > Also, let's get rid of reg-names property as it is not needed anymore. > The driver is expected to parse the reg field based on index to get the > addresses of each LLCC banks. > > Cc: <stable@vger.kernel.org> # 5.12 > Fixes: 0085a33a25cc ("arm64: dts: qcom: sm8250: Add support for LLCC block") > Reported-by: Parikshit Pareek <quic_ppareek@quicinc.com> > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- > arch/arm64/boot/dts/qcom/sm8250.dtsi | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi > index dab5579946f3..439ca5f6000e 100644 > --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi > @@ -3545,8 +3545,9 @@ usb_1_dwc3: usb@a600000 { > > system-cache-controller@9200000 { > compatible = "qcom,sm8250-llcc"; > - reg = <0 0x09200000 0 0x1d0000>, <0 0x09600000 0 0x50000>; > - reg-names = "llcc_base", "llcc_broadcast_base"; > + reg = <0 0x09200000 0 0x50000>, <0 0x09280000 0 0x50000>, > + <0 0x09300000 0 0x50000>, <0 0x09380000 0 0x50000>, > + <0 0x09600000 0 0x50000>; > }; > > usb_2: usb@a8f8800 {
Reviewed-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
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