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SubjectRe: [PATCH 2/3] docs: perf: Fix PMU instance name of hisi-pcie-pmu
On Tue, 25 Oct 2022 19:32:41 +0800
Yicong Yang <yangyicong@huawei.com> wrote:

> From: Yicong Yang <yangyicong@hisilicon.com>
>
> The PMU instance will be called hisi_pcie<sicl>_core<core> rather than
> hisi_pcie<sicl>_<core>. Fix this in the documentation.
>
> Fixes: c8602008e247 ("docs: perf: Add description for HiSilicon PCIe PMU driver")
> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>

Indeed matches with naming from the driver:
https://elixir.bootlin.com/linux/v6.1-rc4/source/drivers/perf/hisilicon/hisi_pcie_pmu.c#L774

Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

> ---
> .../admin-guide/perf/hisi-pcie-pmu.rst | 22 +++++++++----------
> 1 file changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/Documentation/admin-guide/perf/hisi-pcie-pmu.rst b/Documentation/admin-guide/perf/hisi-pcie-pmu.rst
> index 294ebbdb22af..bbe66480ff85 100644
> --- a/Documentation/admin-guide/perf/hisi-pcie-pmu.rst
> +++ b/Documentation/admin-guide/perf/hisi-pcie-pmu.rst
> @@ -15,10 +15,10 @@ HiSilicon PCIe PMU driver
> The PCIe PMU driver registers a perf PMU with the name of its sicl-id and PCIe
> Core id.::
>
> - /sys/bus/event_source/hisi_pcie<sicl>_<core>
> + /sys/bus/event_source/hisi_pcie<sicl>_core<core>
>
> PMU driver provides description of available events and filter options in sysfs,
> -see /sys/bus/event_source/devices/hisi_pcie<sicl>_<core>.
> +see /sys/bus/event_source/devices/hisi_pcie<sicl>_core<core>.
>
> The "format" directory describes all formats of the config (events) and config1
> (filter options) fields of the perf_event_attr structure. The "events" directory
> @@ -33,13 +33,13 @@ monitored by PMU.
> Example usage of perf::
>
> $# perf list
> - hisi_pcie0_0/rx_mwr_latency/ [kernel PMU event]
> - hisi_pcie0_0/rx_mwr_cnt/ [kernel PMU event]
> + hisi_pcie0_core0/rx_mwr_latency/ [kernel PMU event]
> + hisi_pcie0_core0/rx_mwr_cnt/ [kernel PMU event]
> ------------------------------------------
>
> - $# perf stat -e hisi_pcie0_0/rx_mwr_latency/
> - $# perf stat -e hisi_pcie0_0/rx_mwr_cnt/
> - $# perf stat -g -e hisi_pcie0_0/rx_mwr_latency/ -e hisi_pcie0_0/rx_mwr_cnt/
> + $# perf stat -e hisi_pcie0_core0/rx_mwr_latency/
> + $# perf stat -e hisi_pcie0_core0/rx_mwr_cnt/
> + $# perf stat -g -e hisi_pcie0_core0/rx_mwr_latency/ -e hisi_pcie0_core0/rx_mwr_cnt/
>
> The current driver does not support sampling. So "perf record" is unsupported.
> Also attach to a task is unsupported for PCIe PMU.
> @@ -64,7 +64,7 @@ bit8 is set, port=0x100; if these two Root Ports are both monitored, port=0x101.
>
> Example usage of perf::
>
> - $# perf stat -e hisi_pcie0_0/rx_mwr_latency,port=0x1/ sleep 5
> + $# perf stat -e hisi_pcie0_core0/rx_mwr_latency,port=0x1/ sleep 5
>
> -bdf
>
> @@ -76,7 +76,7 @@ For example, "bdf=0x3900" means BDF of target Endpoint is 0000:39:00.0.
>
> Example usage of perf::
>
> - $# perf stat -e hisi_pcie0_0/rx_mrd_flux,bdf=0x3900/ sleep 5
> + $# perf stat -e hisi_pcie0_core0/rx_mrd_flux,bdf=0x3900/ sleep 5
>
> 2. Trigger filter
> Event statistics start when the first time TLP length is greater/smaller
> @@ -90,7 +90,7 @@ means start when TLP length < condition.
>
> Example usage of perf::
>
> - $# perf stat -e hisi_pcie0_0/rx_mrd_flux,trig_len=0x4,trig_mode=1/ sleep 5
> + $# perf stat -e hisi_pcie0_core0/rx_mrd_flux,trig_len=0x4,trig_mode=1/ sleep 5
>
> 3. Threshold filter
> Counter counts when TLP length within the specified range. You can set the
> @@ -103,4 +103,4 @@ when TLP length < threshold.
>
> Example usage of perf::
>
> - $# perf stat -e hisi_pcie0_0/rx_mrd_flux,thr_len=0x4,thr_mode=1/ sleep 5
> + $# perf stat -e hisi_pcie0_core0/rx_mrd_flux,thr_len=0x4,thr_mode=1/ sleep 5

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