Messages in this thread | | | Date | Tue, 8 Nov 2022 17:48:45 +0100 | Subject | Re: [PATCH 2/2] arm64: dts: qcom: ipq8074: align TLMM pin configuration with DT schema | From | Konrad Dybcio <> |
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On 08/11/2022 15:23, Krzysztof Kozlowski wrote: > DT schema expects TLMM pin configuration nodes to be named with > '-state' suffix and their optional children with '-pins' suffix. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Konrad > arch/arm64/boot/dts/qcom/ipq8074.dtsi | 10 +++++----- > 1 file changed, 5 insertions(+), 5 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi > index d3d9e7eb5837..363ccc272cf1 100644 > --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi > +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi > @@ -317,35 +317,35 @@ tlmm: pinctrl@1000000 { > interrupt-controller; > #interrupt-cells = <0x2>; > > - serial_4_pins: serial4-pinmux { > + serial_4_pins: serial4-state { > pins = "gpio23", "gpio24"; > function = "blsp4_uart1"; > drive-strength = <8>; > bias-disable; > }; > > - i2c_0_pins: i2c-0-pinmux { > + i2c_0_pins: i2c-0-state { > pins = "gpio42", "gpio43"; > function = "blsp1_i2c"; > drive-strength = <8>; > bias-disable; > }; > > - spi_0_pins: spi-0-pins { > + spi_0_pins: spi-0-state { > pins = "gpio38", "gpio39", "gpio40", "gpio41"; > function = "blsp0_spi"; > drive-strength = <8>; > bias-disable; > }; > > - hsuart_pins: hsuart-pins { > + hsuart_pins: hsuart-state { > pins = "gpio46", "gpio47", "gpio48", "gpio49"; > function = "blsp2_uart"; > drive-strength = <8>; > bias-disable; > }; > > - qpic_pins: qpic-pins { > + qpic_pins: qpic-state { > pins = "gpio1", "gpio3", "gpio4", > "gpio5", "gpio6", "gpio7", > "gpio8", "gpio10", "gpio11",
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