Messages in this thread | | | Date | Mon, 7 Nov 2022 15:11:07 +0000 | From | Mark Brown <> | Subject | Re: [PATCH v3 3/8] arm64/sysreg: Convert SPE registers to automatic generation |
| |
On Fri, Nov 04, 2022 at 10:55:03AM -0500, Rob Herring wrote:
> Convert all the SPE register defines to automatic generation. No > functional changes. > > New registers and fields for SPEv1.2 are added with the conversion. > > Some of the PMBSR MSS field defines are kept as the automatic generation > has no way to create multiple names for the same register bits. The > meaning of the MSS field depends on other bits.
Reviewed-by: Mark Brown <broonie@kernel.org>
> +Sysreg PMSNEVFR_EL1 3 0 9 9 1 > +Field 63:0 E > +EndSysreg
JFTR as noted last time this looks nothing like the spec but is clearly a sensible interpretation.
I do note that one advantage of doing this register by register rather than en masse is that it makes it a lot easier to avoid re-reviewing the same register... [unhandled content-type:application/pgp-signature] | |