Messages in this thread | | | Subject | Re: [PATCH 2/2] dt-bindings: interrupt-controller: add yaml for LoongArch CPU interrupt controller | From | Liu Peibao <> | Date | Mon, 7 Nov 2022 17:21:15 +0800 |
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On 11/7/22 4:28 PM, Krzysztof Kozlowski wrote: > On 07/11/2022 03:34, Liu Peibao wrote: > > Add commit msg explaining what you are doing here (e.g. the hardware). >
I just add this yaml for what I did in patch 1/2 and the header seems enough to describe what I want to, so I did not add the commit log.
>> Signed-off-by: Liu Peibao <liupeibao@loongson.cn> >> --- >> .../loongarch,cpu-interrupt-controller.yaml | 42 +++++++++++++++++++ >> 1 file changed, 42 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml >> >> diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml >> new file mode 100644 >> index 000000000000..30b742661a3f >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml >> @@ -0,0 +1,42 @@ >> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/interrupt-controller/loongarch,cpu-interrupt-controller.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: LoongArch CPU Interrupt Controller >> + >> +description: > >> + On LoongArch the loongarch_cpu_irq_of_init() helper can be used to initialize >> + the 14 CPU IRQs from a devicetree file and create a irq_domain for this IRQ >> + controller. >> + >> + With the irq_domain in place we can describe how the 14 IRQs are wired to the >> + platforms internal interrupt controller cascade. > > This should be the description of hardware, not Linux drivers. >
OK, I will remove this in the next version of this patch.
>> + >> +maintainers: >> + - Liu Peibao <liupeibao@loongson.cn> >> + >> +properties: >> + compatible: >> + const: loongarch,cpu-interrupt-controller > > You have exactly one and only one type of CPU interrupt controller for > all your Loongarch designs? All current and all future? All? >
It is sure of that "all current and recent designs". It is really hard to limit the design in the distant future.
And if there is updating, maybe I will add additional things like this: "loongarch,cpu-interrupt-controller-2.0".
BR, Peibao
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