Messages in this thread Patch in this message | | | From | Wolfram Sang <> | Subject | [PATCH 1/3] clk: renesas: r8a779g0: Add CMT clocks | Date | Fri, 4 Nov 2022 16:11:33 +0100 |
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Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> --- drivers/clk/renesas/r8a779g0-cpg-mssr.c | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/drivers/clk/renesas/r8a779g0-cpg-mssr.c b/drivers/clk/renesas/r8a779g0-cpg-mssr.c index 7f0b4f75ff4d..1da48c81d3dd 100644 --- a/drivers/clk/renesas/r8a779g0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779g0-cpg-mssr.c @@ -193,6 +193,10 @@ static const struct mssr_mod_clk r8a779g0_mod_clks[] __initconst = { DEF_MOD("tmu4", 717, R8A779G0_CLK_SASYNCPERD2), DEF_MOD("tpu0", 718, R8A779G0_CLK_SASYNCPERD4), DEF_MOD("wdt1:wdt0", 907, R8A779G0_CLK_R), + DEF_MOD("cmt0", 910, R8A779G0_CLK_R), + DEF_MOD("cmt1", 911, R8A779G0_CLK_R), + DEF_MOD("cmt2", 912, R8A779G0_CLK_R), + DEF_MOD("cmt3", 913, R8A779G0_CLK_R), DEF_MOD("pfc0", 915, R8A779G0_CLK_CL16M), DEF_MOD("pfc1", 916, R8A779G0_CLK_CL16M), DEF_MOD("pfc2", 917, R8A779G0_CLK_CL16M), -- 2.35.1
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