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    SubjectRe: [v2 07/10] dts-bindings: phy: Add Cadence HDP-TX DP PHY bindings
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    On 04/11/2022 02:44, Sandor Yu wrote:
    > Add bindings for Cadence HDP-TX DisplayPort PHY.
    >
    > Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
    > ---
    > .../bindings/phy/phy-cadence-hdptx-dp.yaml | 70 +++++++++++++++++++
    > 1 file changed, 70 insertions(+)
    > create mode 100644 Documentation/devicetree/bindings/phy/phy-cadence-hdptx-dp.yaml
    >
    > diff --git a/Documentation/devicetree/bindings/phy/phy-cadence-hdptx-dp.yaml b/Documentation/devicetree/bindings/phy/phy-cadence-hdptx-dp.yaml
    > new file mode 100644
    > index 000000000000..ab6f4e25c425
    > --- /dev/null
    > +++ b/Documentation/devicetree/bindings/phy/phy-cadence-hdptx-dp.yaml

    Use filename matching compatible, so cdns,hdptx-dp-phy.yaml

    > @@ -0,0 +1,70 @@
    > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
    > +%YAML 1.2
    > +---
    > +$id: "http://devicetree.org/schemas/phy/phy-cadence-hdptx-dp.yaml#"
    > +$schema: "http://devicetree.org/meta-schemas/core.yaml#"

    Drop quotes from both lines.

    > +
    > +title: Cadence HDP(HDMI/DisplayPort) TX PHY for DisplayPort protocol binding

    Drop binding

    > +
    > +description:
    > + This binding describes the Cadence HDP-TX PHY for DispalyPort protocol.

    Drop "This binding describes"

    > +
    > +maintainers:
    > + - Sandor Yu <sandor.yu@nxp.com>
    > +
    > +properties:
    > + compatible:
    > + enum:
    > + - cdns,hdptx-dp-phy
    > +
    > + reg:
    > + description:
    > + Offset of Cadence HDPTX APB configuration registers.

    Same comments as usual.

    > +
    > + clocks:
    > + items:
    > + description:
    > + PHY reference clock. Must contain an entry in clock-names.

    Drop "Must contain an entry in clock-names."

    > +
    > + clock-names:
    > + items:
    > + - const: refclk
    > +
    > + "#phy-cells":
    > + const: 0
    > +
    > + cdns,num-lanes:
    > + description:
    > + Number of lanes.
    > + $ref: /schemas/types.yaml#/definitions/uint32
    > + enum: [1, 2, 3, 4]
    > + default: 4
    > +
    > + cdns,max-bit-rate:
    > + description:
    > + Maximum DisplayPort link bit rate to use, in Mbps
    > + $ref: /schemas/types.yaml#/definitions/uint32
    > + enum: [2160, 2430, 2700, 3240, 4320, 5400]
    > + default: 5400
    > +
    > +required:
    > + - compatible
    > + - reg
    > + - clocks
    > + - clock-names
    > + - "#phy-cells"
    > +
    > +additionalProperties: false
    > +
    > +examples:
    > + - |
    > + #include <dt-bindings/phy/phy.h>
    > + dp_phy: dp_phy@32c00000 {

    phy
    (and no underscores in node names)

    > + compatible = "cdns,hdptx-dp-phy";
    > + reg = <0x32c00000 0x100000>;
    > + #phy-cells = <0>;
    > + clocks = <&hdmi_phy_27m>;
    > + clock-names = "refclk";
    > + cdns,num-lanes = <4>;
    > + cdns,max-bit-rate = <5400>;
    > + };

    Best regards,
    Krzysztof

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