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    SubjectRe: [PATCH v7 17/20] x86/virt/tdx: Configure global KeyID on all packages
    On Wed, Nov 30, 2022 at 08:34:46AM +0000, Huang, Kai wrote:
    > On Wed, 2022-11-30 at 11:35 +0800, Binbin Wu wrote:
    > > On 11/21/2022 8:26 AM, Kai Huang wrote:
    > > > After the array of TDMRs and the global KeyID are configured to the TDX
    > > > module, use TDH.SYS.KEY.CONFIG to configure the key of the global KeyID
    > > > on all packages.
    > > >
    > > > TDH.SYS.KEY.CONFIG must be done on one (any) cpu for each package. And
    > > > it cannot run concurrently on different CPUs. Implement a helper to
    > > > run SEAMCALL on one cpu for each package one by one, and use it to
    > > > configure the global KeyID on all packages.
    > > >
    > > > Intel hardware doesn't guarantee cache coherency across different
    > > > KeyIDs. The kernel needs to flush PAMT's dirty cachelines (associated
    > > > with KeyID 0) before the TDX module uses the global KeyID to access the
    > > > PAMT. Following the TDX module specification, flush cache before
    > > > configuring the global KeyID on all packages.
    > > >
    > > > Given the PAMT size can be large (~1/256th of system RAM), just use
    > > > WBINVD on all CPUs to flush.
    > > >
    > > > Note if any TDH.SYS.KEY.CONFIG fails, the TDX module may already have
    > > > used the global KeyID to write any PAMT. Therefore, need to use WBINVD
    > > > to flush cache before freeing the PAMTs back to the kernel. Note using
    > > > MOVDIR64B (which changes the page's associated KeyID from the old TDX
    > > > private KeyID back to KeyID 0, which is used by the kernel)
    > >
    > > It seems not accurate to say MOVDIR64B changes the page's associated KeyID.
    > > It just uses the current KeyID for memory operations.
    >
    > The "write" to the memory changes the page's associated KeyID to the KeyID that
    > does the "write". A more accurate expression perhaps should be MOVDIR64B +
    > MFENSE, but I think it doesn't matter in changelog.

    MOVDIR64B KeyID for the cache line, not the page. Integrity tracked on
    per-cacheline basis.

    --
    Kiryl Shutsemau / Kirill A. Shutemov

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