Messages in this thread | | | Date | Tue, 29 Nov 2022 09:31:17 +0100 | From | Borislav Petkov <> | Subject | Re: [PATCH] x86/boot: Remove x86_32 PIC using ebx workaround |
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On Tue, Nov 29, 2022 at 08:39:23AM +0100, Uros Bizjak wrote: > On Mon, Nov 28, 2022 at 11:20 PM Borislav Petkov <bp@alien8.de> wrote: > > > > On Fri, Nov 04, 2022 at 01:45:46PM +0100, Uros Bizjak wrote: > > > Current minimum required version of GCC is version 5.1 which allows > > > reuse of PIC hard register on x86/x86-64 targets [1]. Remove > > > obsolete workaround that was needed for earlier GCC versions. > > > > > > [1] https://gcc.gnu.org/gcc-5/changes.html > > > > Thanks for the doc pointer. > > > > Lemme see if I understand this commit message correctly: > > > > SysV i386 ABI says that %ebx is used as the base reg in PIC. gcc 5 and > > newer can handle all possible cases properly where inline asm could > > clobber the PIC reg. I.e., it is able to deal with the "=b" constraint > > where an insn can overwrite %ebx and it'll push and pop around that > > statement. > > gcc-5 considers PIC register as a pseudo-register and reloads it
So not a "hard" register as you say above?
> x86_64 does not use PIC register for small code models. Also, it uses > %r15 instead of %rbx for PIC register, so the removed workaround > applies only to x86_32.
Let's see:
arch/x86/Makefile: # Never want PIC in a 32-bit kernel, prevent breakage with GCC built # with nonstandard options KBUILD_CFLAGS += -fno-pic
$ gcc -Wp,-MMD,arch/x86/boot/.cpuflags.o.d ... -fno-pic ... -D__KBUILD_MODNAME=kmod_cpuflags -c -o arch/x86/boot/cpuflags.o arch/x86/boot/cpuflags.c
So this workaround applies to nothing, I'd say. :)
-- Regards/Gruss, Boris.
https://people.kernel.org/tglx/notes-about-netiquette
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