Messages in this thread | | | From | Vadym Kochan <> | Subject | Re: [PATCH v2 2/3] PCI: armada8k: Add AC5 SoC support | Date | Fri, 25 Nov 2022 08:43:06 +0000 |
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Hi Thomas,
> On Thu, 24 Nov 2022 15:58:27 +0200 > Vadym Kochan <vadym.kochan@plvision.eu> wrote: > >> -static int armada8k_pcie_start_link(struct dw_pcie *pci) >> -{ >> - u32 reg; >> - >> - /* Start LTSSM */ >> - reg = dw_pcie_readl_dbi(pci, PCIE_GLOBAL_CONTROL_REG); >> - reg |= PCIE_APP_LTSSM_EN; >> - dw_pcie_writel_dbi(pci, PCIE_GLOBAL_CONTROL_REG, reg); >> - >> - return 0; >> -} > >So this code is going away, but I don't see it being re-added anywhere. >I don't think anything in the code you are adding that sets the >LTSSM_EN bit in PCIE_GLOBAL_CONTROL_REG. Am I missing something? > >Thomas >-- >Thomas Petazzoni, co-owner and CEO, Bootlin >Embedded Linux and Kernel engineering and training >https://bootlin.com
There is a reply from the Marvell:
[quote] this is not needed, as by the time Linux is loaded, link has already been established (by boot loaders)
So this code is not needed. [/quote]
Thanks,
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