Messages in this thread | | | From | Guo Ren <> | Date | Thu, 24 Nov 2022 10:10:30 +0800 | Subject | Re: [PATCH V3 1/5] riscv: ftrace: Fixup panic by disabling preemption |
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On Thu, Nov 24, 2022 at 4:07 AM Conor Dooley <conor@kernel.org> wrote: > > On Wed, Nov 23, 2022 at 10:39:46AM -0500, guoren@kernel.org wrote: > > From: Andy Chiu <andy.chiu@sifive.com> > > > > In RISCV, we must use an AUIPC + JALR pair to encode an immediate, > > forming a jump that jumps to an address over 4K. This may cause errors > > if we want to enable kernel preemption and remove dependency from > > patching code with stop_machine(). For example, if a task was switched > > out on auipc. And, if we changed the ftrace function before it was > > switched back, then it would jump to an address that has updated 11:0 > > bits mixing with previous XLEN:12 part. > > > > p: patched area performed by dynamic ftrace > > ftrace_prologue: > > p| REG_S ra, -SZREG(sp) > > p| auipc ra, 0x? ------------> preempted > > ... > > change ftrace function > > ... > > p| jalr -?(ra) <------------- switched back > > p| REG_L ra, -SZREG(sp) > > func: > > xxx > > ret > > > > Fixes: fc76b8b8011 ("riscv: Using PATCHABLE_FUNCTION_ENTRY instead of MCOUNT") > > ========== > verify_fixes - FAILED > > Commit: be26b864dac9 ("riscv: ftrace: Fixup panic by disabling preemption") > Fixes tag: Fixes: fc76b8b8011 ("riscv: Using PATCHABLE_FUNCTION_ENTRY instead of MCOUNT") > Has these problem(s): > - Target SHA1 does not exist > > This should instead be: > Fixes: afc76b8b8011 ("riscv: Using PATCHABLE_FUNCTION_ENTRY instead of MCOUNT") Thank you! Sorry, I missed the first letter :P
> > Thanks, > Conor. >
-- Best Regards Guo Ren
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