Messages in this thread | | | From | "Moger, Babu" <> | Subject | RE: [PATCH v8 01/13] x86/cpufeatures: Add Slow Memory Bandwidth Allocation feature flag | Date | Wed, 23 Nov 2022 23:09:51 +0000 |
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[AMD Official Use Only - General]
Hi Fenghua,
> -----Original Message----- > From: Yu, Fenghua <fenghua.yu@intel.com> > Sent: Wednesday, November 23, 2022 12:22 PM > To: Moger, Babu <Babu.Moger@amd.com>; corbet@lwn.net; Chatre, Reinette > <reinette.chatre@intel.com>; tglx@linutronix.de; mingo@redhat.com; > bp@alien8.de > Cc: dave.hansen@linux.intel.com; x86@kernel.org; hpa@zytor.com; > paulmck@kernel.org; akpm@linux-foundation.org; quic_neeraju@quicinc.com; > rdunlap@infradead.org; damien.lemoal@opensource.wdc.com; > songmuchun@bytedance.com; peterz@infradead.org; jpoimboe@kernel.org; > pbonzini@redhat.com; Bae, Chang Seok <chang.seok.bae@intel.com>; > pawan.kumar.gupta@linux.intel.com; jmattson@google.com; > daniel.sneddon@linux.intel.com; Das1, Sandipan <Sandipan.Das@amd.com>; > Luck, Tony <tony.luck@intel.com>; james.morse@arm.com; linux- > doc@vger.kernel.org; linux-kernel@vger.kernel.org; bagasdotme@gmail.com; > Eranian, Stephane <eranian@google.com> > Subject: RE: [PATCH v8 01/13] x86/cpufeatures: Add Slow Memory Bandwidth > Allocation feature flag > > Hi, Babu, > > > diff --git a/arch/x86/include/asm/cpufeatures.h > > b/arch/x86/include/asm/cpufeatures.h > > index aefd0816a333..d68b4c9c181d 100644 > > --- a/arch/x86/include/asm/cpufeatures.h > > +++ b/arch/x86/include/asm/cpufeatures.h > > @@ -305,6 +305,7 @@ > > #define X86_FEATURE_USE_IBPB_FW (11*32+16) /* "" Use IBPB > > during runtime firmware calls */ > > #define X86_FEATURE_RSB_VMEXIT_LITE (11*32+17) /* "" Fill RSB on > VM > > exit when EIBRS is enabled */ > > #define X86_FEATURE_CALL_DEPTH (11*32+18) /* "" Call depth > > tracking for RSB stuffing */ > > +#define X86_FEATURE_SMBA (11*32+19) /* Slow Memory > > Bandwidth Allocation */ > > > > /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */ > > #define X86_FEATURE_AVX_VNNI (12*32+ 4) /* AVX VNNI > > instructions */ > > diff --git a/arch/x86/kernel/cpu/scattered.c > > b/arch/x86/kernel/cpu/scattered.c index fc01f81f6e2a..5a5f17ed69a2 > > 100644 > > --- a/arch/x86/kernel/cpu/scattered.c > > +++ b/arch/x86/kernel/cpu/scattered.c > > @@ -44,6 +44,7 @@ static const struct cpuid_bit cpuid_bits[] = { > > { X86_FEATURE_CPB, CPUID_EDX, 9, 0x80000007, 0 }, > > { X86_FEATURE_PROC_FEEDBACK, CPUID_EDX, 11, 0x80000007, 0 }, > > { X86_FEATURE_MBA, CPUID_EBX, 6, 0x80000008, 0 }, > > + { X86_FEATURE_SMBA, CPUID_EBX, 2, 0x80000020, 0 }, > > { X86_FEATURE_PERFMON_V2, CPUID_EAX, 0, 0x80000022, 0 }, > > { X86_FEATURE_AMD_LBR_V2, CPUID_EAX, 1, 0x80000022, 0 }, > > { 0, 0, 0, 0, 0 } > > > > Shouldn't X86_FEATURE_SMBA depend on X86_FEATURE_MBA? Need to add > the dependency in cpuid-deps.c
I won't consider them as dependents. They both have separate CPUID bits and MSRs. Thanks Babu [unhandled content-type:application/ms-tnef] | |