Messages in this thread | | | Date | Tue, 22 Nov 2022 09:09:54 +0000 | Subject | Re: [PATCH v2 4/8] dt-bindings: sifive,ccache0: Support StarFive JH7110 SoC | From | Ben Dooks <> |
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On 22/11/2022 09:07, Conor Dooley wrote: > On Tue, Nov 22, 2022 at 04:40:23PM +0800, Hal Feng wrote: >> On Fri, 18 Nov 2022 19:39:52 +0800, Conor Dooley wrote: >>> On Fri, Nov 18, 2022 at 11:37:50AM +0000, Conor Dooley wrote: >>>> On Fri, Nov 18, 2022 at 09:17:10AM +0800, Hal Feng wrote: >>>>> From: Emil Renner Berthing <kernel@esmil.dk> >>>>> >>>>> This cache controller is also used on the StarFive JH7110 SoC. >>>> >>>> "... and configured identically to that of the FU740"? >>>> Anyways, >>>> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> >>> >>> Actually, after looking at the next patch - why can you not fall back to >>> the fu740 one since you appear to have the same configuration as it? >> >> Right, I will drop this patch and use "sifive,fu740-c000-ccache" as >> compatible in dts. > > Uh, that's not quite what I was suggesting. Rather than using that one > in isolation, you can do the following in your dt: > "starfive,jh7110-ccache", "sifive,fu740-c000-ccache" > > And then in the driver we need to make no changes - unless down the line > we find some sort of issue that requires special handling etc. There's > no harm in having a "starfive,jh7110-ccache" IMO.
Yeah, sifive,ccache0 is probably the generic one which would get this working.
-- Ben
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