Messages in this thread | | | From | Tudor Ambarus <> | Subject | Re: [PATCH v2 0/1] mtd: spi-nor: gigadevice: gd25q256: replace gd25q256_default_init with gd25q256_post_bfpt | Date | Mon, 21 Nov 2022 16:32:07 +0200 |
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On Mon, 17 Oct 2022 01:19:00 +0800, yaliang.wang@windriver.com wrote: > GD25Q256 'C' generation 'GD25Q256C' implements the JESD216 standards, > JESD216 doesn't define the QER field in BFPT, but the 'GD25Q256C' > does define QE bit in status register 1 bit 6, so we need to tweak > quad_enable to properly set the function. > > 'D' and 'E' generations implement the JESD216B standards, so parsing > the SFDP to set quad_enable function is enough for them. > > [...]
Updated comment in gd25q256_post_bfpt and applied to spi-nor/next, thanks!
[1/1] mtd: spi-nor: gigadevice: gd25q256: replace gd25q256_default_init with gd25q256_post_bfpt https://git.kernel.org/mtd/c/4dc49062a7e9
Best regards, -- Tudor Ambarus <tudor.ambarus@microchip.com>
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