Messages in this thread | | | From | <> | Subject | Re: [RESEND PATCH v4 1/1] mtd: spi-nor: winbond: Add support for w25q01jvq | Date | Mon, 21 Nov 2022 13:50:50 +0000 |
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On 11/11/22 08:05, Potin Lai wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > From: Potin Lai <potin.lai@quantatw.com> > > Add support for winbond w25q01jvq chip > > Signed-off-by: Potin Lai <potin.lai@quantatw.com> > Signed-off-by: Patrick Williams <patrick@stwcx.xyz> > Reviewed-by: Michael Walle <michael@walle.cc> > Signed-off-by: Joel Stanley <joel@jms.id.au> > > --- > LINK: [v3] https://lore.kernel.org/all/20220222085148.21594-1-potin.lai@quantatw.com/ > LINK: [v2] https://lore.kernel.org/all/20220222064227.16724-1-potin.lai@quantatw.com/ > LINK: [v1] https://lore.kernel.org/all/20211224104522.24615-1-potin.lai@quantatw.com/ > > Changes v3 --> v4: > - fix correct chip name "w25q01jvq" > > root@bletchley:~# cat /sys/devices/platform/ahb/1e620000.spi/spi_master/spi0/spi0.0/spi-nor/jedec_id > ef4021 > root@bletchley:~# cat /sys/devices/platform/ahb/1e620000.spi/spi_master/spi0/spi0.0/spi-nor/manufacturer > winbond > root@bletchley:~# cat /sys/devices/platform/ahb/1e620000.spi/spi_master/spi0/spi0.0/spi-nor/partname > w25q01jvq > root@bletchley:~# md5sum /sys/devices/platform/ahb/1e620000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp > a7b9dbf76e99a33db99e557b6676588a /sys/devices/platform/ahb/1e620000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp > root@bletchley:~# hexdump -C /sys/devices/platform/ahb/1e620000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp > 00000000 53 46 44 50 06 01 01 ff 00 06 01 10 80 00 00 ff |SFDP............| > 00000010 84 00 01 02 d0 00 00 ff 03 00 01 02 f0 00 00 ff |................| > 00000020 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| > * > 00000080 e5 20 fb ff ff ff ff 3f 44 eb 08 6b 08 3b 42 bb |. .....?D..k.;B.| > 00000090 fe ff ff ff ff ff 00 00 ff ff 40 eb 0c 20 0f 52 |..........@.. .R| > 000000a0 10 d8 00 00 36 02 a6 00 82 ea 14 e2 e9 63 76 33 |....6........cv3| > 000000b0 7a 75 7a 75 f7 a2 d5 5c 19 f7 4d ff e9 70 f9 a5 |zuzu...\..M..p..| > 000000c0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| > 000000d0 ff 0a f0 ff 21 ff dc ff |....!...| > 000000d8 > > Changes v2 --> v3: > - move spi-nor flash information to comment area > > Changes v1 --> v2: > - rework patch to work with new flags > --- > drivers/mtd/spi-nor/winbond.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c > index ffaa24055259..e60ad92c0ace 100644 > --- a/drivers/mtd/spi-nor/winbond.c > +++ b/drivers/mtd/spi-nor/winbond.c > @@ -139,6 +139,8 @@ static const struct flash_info winbond_nor_parts[] = { > { "w25q512jvq", INFO(0xef4020, 0, 64 * 1024, 1024) > NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | > SPI_NOR_QUAD_READ) }, > + { "w25q01jvq", INFO(0xef4021, 0, 64 * 1024, 2048) > + PARSE_SFDP }, > }; >
Thanks all for sending and reviewing this patch. As this entry uses just the PARSE_SFDP flag, without any specific flash/vendor implementations, we could instead don't define an entry at all and use the spi-nor-generic functionality introduced by Michael at: https://lore.kernel.org/linux-mtd/166903807811.85501.6803386075881922742.b4-ty@microchip.com/T/#t
I've applied Michael's patch set, please try the latest spi-nor/next branch. We won't be adding new flash entries if the support for them is solely based on SFDP, and will instead use the generic spi-nor-generic driver introduced by Michael.
-- Cheers, ta
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