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SubjectRe: [PATCH 1/4] clk: imx: imxrt1050: fix IMXRT1050_CLK_LCDIF_APB offsets
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On 21/11/22 23:10, Abel Vesa wrote:
> On 22-11-17 19:10:11, Giulio Benetti wrote:
>> Fix IMXRT1050_CLK_LCDIF_APB offsets.
>>
>> Fixes: 7154b046d8f3 ("clk: imx: Add initial support for i.MXRT1050 clock driver")
>> Cc: Jesse Taube <mr.bossman075@gmail.com>
>> Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
>
> Applied patches #1 and #2. Thanks.
>
> As a suggestion, next time, please send two separate patchsets,
> since there are two different subsystems involved (and the patches #3
> and #4 are not related to #1 and #2).

Ok, thank you for pointing. Next time I will do like that.

--
Giulio Benetti
CEO/CTO@Benetti Engineering sas

>> ---
>> V1->V2:
>> * nothing done
>> V2->V3:
>> * added commit log and not only subject as suggested by Jesse Taube
>> V3->V4:
>> * added Fixes: as suggested by Fabio Estevam
>> ---
>> drivers/clk/imx/clk-imxrt1050.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/clk/imx/clk-imxrt1050.c b/drivers/clk/imx/clk-imxrt1050.c
>> index 9539d35588ee..26108e9f7e67 100644
>> --- a/drivers/clk/imx/clk-imxrt1050.c
>> +++ b/drivers/clk/imx/clk-imxrt1050.c
>> @@ -140,7 +140,7 @@ static int imxrt1050_clocks_probe(struct platform_device *pdev)
>> hws[IMXRT1050_CLK_USDHC1] = imx_clk_hw_gate2("usdhc1", "usdhc1_podf", ccm_base + 0x80, 2);
>> hws[IMXRT1050_CLK_USDHC2] = imx_clk_hw_gate2("usdhc2", "usdhc2_podf", ccm_base + 0x80, 4);
>> hws[IMXRT1050_CLK_LPUART1] = imx_clk_hw_gate2("lpuart1", "lpuart_podf", ccm_base + 0x7c, 24);
>> - hws[IMXRT1050_CLK_LCDIF_APB] = imx_clk_hw_gate2("lcdif", "lcdif_podf", ccm_base + 0x74, 10);
>> + hws[IMXRT1050_CLK_LCDIF_APB] = imx_clk_hw_gate2("lcdif", "lcdif_podf", ccm_base + 0x70, 28);
>> hws[IMXRT1050_CLK_DMA] = imx_clk_hw_gate("dma", "ipg", ccm_base + 0x7C, 6);
>> hws[IMXRT1050_CLK_DMA_MUX] = imx_clk_hw_gate("dmamux0", "ipg", ccm_base + 0x7C, 7);
>> imx_check_clk_hws(hws, IMXRT1050_CLK_END);
>> --
>> 2.34.1
>>

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