Messages in this thread | | | Date | Fri, 18 Nov 2022 10:11:35 -0800 | Subject | Re: [PATCH v3 1/2] x86/tsx: Add feature bit for TSX control MSR support | From | Dave Hansen <> |
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On 11/15/22 11:17, Pawan Gupta wrote: > Support for TSX control MSR is enumerated in MSR_IA32_ARCH_CAPABILITIES. > This is different from how other CPU features are enumerated i.e. via > CPUID. Currently a call to tsx_ctrl_is_supported() is required for > enumerating the feature. In the absence of feature bit for TSX control, > any code that relies on checking feature bits directly will not work. > > In preparation for adding a feature bit check in MSR save/restore during > suspend/resume, set a new feature bit X86_FEATURE_TSX_CTRL when > MSR_IA32_TSX_CTRL is present. Also make tsx_ctrl_is_supported() use the > new feature bit to avoid any overhead of reading the MSR.
Reviewed-by: Dave Hansen <dave.hansen@linux.intel.com>
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