lkml.org 
[lkml]   [2022]   [Nov]   [16]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH 7/9] clk: qcom: rpmh: Add support for SM8550 rpmh clocks
    Date
    Adds the RPMH clocks present in SM8550 SoC.

    Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
    ---
    drivers/clk/qcom/clk-rpmh.c | 110 +++++++++++++++++++++++++++++-------
    1 file changed, 90 insertions(+), 20 deletions(-)

    diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c
    index 1da45a6e2f29..63975490ab54 100644
    --- a/drivers/clk/qcom/clk-rpmh.c
    +++ b/drivers/clk/qcom/clk-rpmh.c
    @@ -579,6 +579,73 @@ static const struct clk_rpmh_desc clk_rpmh_sm8450 = {
    .num_clks = ARRAY_SIZE(sm8450_rpmh_clocks),
    };

    +#define DEFINE_CLK_RPMH_FIXED(_platform, _name, _name_active, \
    + _parent_name, _name_active_parent, \
    + _div) \
    + static struct clk_fixed_factor _platform##_##_name = { \
    + .mult = 1, \
    + .div = _div, \
    + .hw.init = &(struct clk_init_data){ \
    + .ops = &clk_fixed_factor_ops, \
    + .name = #_name, \
    + .parent_data = &(const struct clk_parent_data){ \
    + .fw_name = #_parent_name, \
    + .name = #_parent_name, \
    + }, \
    + .num_parents = 1, \
    + }, \
    + }; \
    + static struct clk_fixed_factor _platform##_##_name_active = { \
    + .mult = 1, \
    + .div = _div, \
    + .hw.init = &(struct clk_init_data){ \
    + .ops = &clk_fixed_factor_ops, \
    + .name = #_name_active, \
    + .parent_data = &(const struct clk_parent_data){ \
    + .fw_name = #_name_active_parent,\
    + .name = #_name_active_parent, \
    + }, \
    + .num_parents = 1, \
    + }, \
    + }
    +
    +DEFINE_CLK_RPMH_ARC(sm8550, xo_pad, xo_pad_ao, "xo.lvl", 0x03, 2);
    +DEFINE_CLK_RPMH_FIXED(sm8550, bi_tcxo, bi_tcxo_ao, xo_pad, xo_pad_ao, 2);
    +DEFINE_CLK_RPMH_VRM(sm8550, rf_clk1, rf_clk1_ao, "clka1", 1);
    +DEFINE_CLK_RPMH_VRM(sm8550, rf_clk2, rf_clk2_ao, "clka2", 1);
    +DEFINE_CLK_RPMH_VRM(sm8550, rf_clk3, rf_clk3_ao, "clka3", 1);
    +DEFINE_CLK_RPMH_VRM(sm8550, rf_clk4, rf_clk4_ao, "clka4", 1);
    +DEFINE_CLK_RPMH_VRM(sm8550, ln_bb_clk1, ln_bb_clk1_ao, "clka6", 2);
    +DEFINE_CLK_RPMH_VRM(sm8550, ln_bb_clk2, ln_bb_clk2_ao, "clka7", 2);
    +DEFINE_CLK_RPMH_VRM(sm8550, ln_bb_clk3, ln_bb_clk3_ao, "clka8", 2);
    +
    +static struct clk_hw *sm8550_rpmh_clocks[] = {
    + [RPMH_CXO_PAD_CLK] = &sm8550_xo_pad.hw,
    + [RPMH_CXO_PAD_CLK_A] = &sm8550_xo_pad_ao.hw,
    + [RPMH_CXO_CLK] = &sm8550_bi_tcxo.hw,
    + [RPMH_CXO_CLK_A] = &sm8550_bi_tcxo_ao.hw,
    + [RPMH_LN_BB_CLK1] = &sm8550_ln_bb_clk1.hw,
    + [RPMH_LN_BB_CLK1_A] = &sm8550_ln_bb_clk1_ao.hw,
    + [RPMH_LN_BB_CLK2] = &sm8550_ln_bb_clk2.hw,
    + [RPMH_LN_BB_CLK2_A] = &sm8550_ln_bb_clk2_ao.hw,
    + [RPMH_LN_BB_CLK3] = &sm8550_ln_bb_clk3.hw,
    + [RPMH_LN_BB_CLK3_A] = &sm8550_ln_bb_clk3_ao.hw,
    + [RPMH_RF_CLK1] = &sm8550_rf_clk1.hw,
    + [RPMH_RF_CLK1_A] = &sm8550_rf_clk1_ao.hw,
    + [RPMH_RF_CLK2] = &sm8550_rf_clk2.hw,
    + [RPMH_RF_CLK2_A] = &sm8550_rf_clk2_ao.hw,
    + [RPMH_RF_CLK3] = &sm8550_rf_clk3.hw,
    + [RPMH_RF_CLK3_A] = &sm8550_rf_clk3_ao.hw,
    + [RPMH_RF_CLK4] = &sm8550_rf_clk4.hw,
    + [RPMH_RF_CLK4_A] = &sm8550_rf_clk4_ao.hw,
    + [RPMH_IPA_CLK] = &sdm845_ipa.hw,
    +};
    +
    +static const struct clk_rpmh_desc clk_rpmh_sm8550 = {
    + .clks = sm8550_rpmh_clocks,
    + .num_clks = ARRAY_SIZE(sm8550_rpmh_clocks),
    +};
    +
    static struct clk_hw *sc7280_rpmh_clocks[] = {
    [RPMH_CXO_CLK] = &sc7280_bi_tcxo.hw,
    [RPMH_CXO_CLK_A] = &sc7280_bi_tcxo_ao.hw,
    @@ -694,29 +761,31 @@ static int clk_rpmh_probe(struct platform_device *pdev)

    name = hw_clks[i]->init->name;

    - rpmh_clk = to_clk_rpmh(hw_clks[i]);
    - res_addr = cmd_db_read_addr(rpmh_clk->res_name);
    - if (!res_addr) {
    - dev_err(&pdev->dev, "missing RPMh resource address for %s\n",
    - rpmh_clk->res_name);
    - return -ENODEV;
    - }
    + if (hw_clks[i]->init->ops != &clk_fixed_factor_ops) {
    + rpmh_clk = to_clk_rpmh(hw_clks[i]);
    + res_addr = cmd_db_read_addr(rpmh_clk->res_name);
    + if (!res_addr) {
    + dev_err(&pdev->dev, "missing RPMh resource address for %s\n",
    + rpmh_clk->res_name);
    + return -ENODEV;
    + }

    - data = cmd_db_read_aux_data(rpmh_clk->res_name, &aux_data_len);
    - if (IS_ERR(data)) {
    - ret = PTR_ERR(data);
    - dev_err(&pdev->dev,
    - "error reading RPMh aux data for %s (%d)\n",
    - rpmh_clk->res_name, ret);
    - return ret;
    - }
    + data = cmd_db_read_aux_data(rpmh_clk->res_name, &aux_data_len);
    + if (IS_ERR(data)) {
    + ret = PTR_ERR(data);
    + dev_err(&pdev->dev,
    + "error reading RPMh aux data for %s (%d)\n",
    + rpmh_clk->res_name, ret);
    + return ret;
    + }

    - /* Convert unit from Khz to Hz */
    - if (aux_data_len == sizeof(*data))
    - rpmh_clk->unit = le32_to_cpu(data->unit) * 1000ULL;
    + /* Convert unit from Khz to Hz */
    + if (aux_data_len == sizeof(*data))
    + rpmh_clk->unit = le32_to_cpu(data->unit) * 1000ULL;

    - rpmh_clk->res_addr += res_addr;
    - rpmh_clk->dev = &pdev->dev;
    + rpmh_clk->res_addr += res_addr;
    + rpmh_clk->dev = &pdev->dev;
    + }

    ret = devm_clk_hw_register(&pdev->dev, hw_clks[i]);
    if (ret) {
    @@ -752,6 +821,7 @@ static const struct of_device_id clk_rpmh_match_table[] = {
    { .compatible = "qcom,sm8250-rpmh-clk", .data = &clk_rpmh_sm8250},
    { .compatible = "qcom,sm8350-rpmh-clk", .data = &clk_rpmh_sm8350},
    { .compatible = "qcom,sm8450-rpmh-clk", .data = &clk_rpmh_sm8450},
    + { .compatible = "qcom,sm8550-rpmh-clk", .data = &clk_rpmh_sm8550},
    { .compatible = "qcom,sc7280-rpmh-clk", .data = &clk_rpmh_sc7280},
    { }
    };
    --
    2.34.1
    \
     
     \ /
      Last update: 2022-11-16 12:00    [W:4.847 / U:0.536 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site