Messages in this thread | | | From | "Sriranjani P" <> | Subject | RE: [PATCH 2/4] net: stmmac: dwc-qos: Add FSD EQoS support | Date | Wed, 16 Nov 2022 11:54:47 +0530 |
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> -----Original Message----- > From: Andrew Lunn [mailto:andrew@lunn.ch] > Sent: 04 November 2022 20:55 > To: Sriranjani P <sriranjani.p@samsung.com> > Cc: peppe.cavallaro@st.com; alexandre.torgue@foss.st.com; > joabreu@synopsys.com; davem@davemloft.net; edumazet@google.com; > kuba@kernel.org; pabeni@redhat.com; mcoquelin.stm32@gmail.com; > richardcochran@gmail.com; netdev@vger.kernel.org; linux-stm32@st-md- > mailman.stormreply.com; linux-arm-kernel@lists.infradead.org; linux- > kernel@vger.kernel.org; Chandrasekar R <rcsekar@samsung.com>; Suresh > Siddha <ssiddha@tesla.com> > Subject: Re: [PATCH 2/4] net: stmmac: dwc-qos: Add FSD EQoS support > > > +static int dwc_eqos_setup_rxclock(struct platform_device *pdev) { > > + struct device_node *np = pdev->dev.of_node; > > + > > + if (np && of_property_read_bool(np, "rx-clock-mux")) { > > + unsigned int reg, val; > > + struct regmap *syscon = > syscon_regmap_lookup_by_phandle(np, > > + "rx-clock-mux"); > > + > > + if (IS_ERR(syscon)) { > > + dev_err(&pdev->dev, "couldn't get the rx-clock-mux > syscon!\n"); > > + return PTR_ERR(syscon); > > + } > > + > > + if (of_property_read_u32_index(np, "rx-clock-mux", 1, > ®)) { > > + dev_err(&pdev->dev, "couldn't get the rx-clock-mux > reg. offset!\n"); > > + return -EINVAL; > > + } > > + > > + if (of_property_read_u32_index(np, "rx-clock-mux", 2, > &val)) { > > + dev_err(&pdev->dev, "couldn't get the rx-clock-mux > reg. val!\n"); > > + return -EINVAL; > > + } > > + > > + regmap_write(syscon, reg, val); > > This appears to be one of those binds which allows any magic value to be > placed into any register. That is not how DT should be used. [Sriranjani P] Will fix in the next version. > > Andrew [Sriranjani P] Thank you for the review comment.
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