Messages in this thread | | | From | Geert Uytterhoeven <> | Date | Wed, 16 Nov 2022 10:06:43 +0100 | Subject | Re: [PATCH 2/3] riscv: dts: renesas: r9a07g043f/rzfive-smarc-som: Enable ADC/OPP/Thermal Zones/TSU |
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Hi Prabhakar,
On Wed, Nov 16, 2022 at 10:03 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > On Tue, Nov 15, 2022 at 11:51 AM Prabhakar <prabhakar.csengg@gmail.com> wrote: > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > > > Enable support for below blocks found on RZ/Five SMARC EVK SoC/SoM: > > - ADC > > - OPP > > - Thermal Zones > > - TSU > > > > Note, these blocks are enabled in RZ/G2UL SMARC SoM DTSI [0] hence > > deleting these disabled nodes from RZ/Five SMARC SoM DTSI enables them > > here too as we include [0] in RZ/Five SMARC SoM DTSI. > > > > [0] arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi > > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Thanks for your patch! > > > --- a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi > > +++ b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi > > @@ -16,13 +16,6 @@ aliases { > > chosen { > > bootargs = "ignore_loglevel"; > > }; > > - > > - /delete-node/opp-table-0; > > - /delete-node/thermal-zones; > > -}; > > - > > -&adc { > > - status = "disabled"; > > I believe this is not sufficient to enable the ADC, as it is disabled > by default? > So this needs to set the status to "okay" and configure pin > control, depending on SW_SW0_DEV_SEL, just like in > arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi?
Sorry, scrap that. grabbing my morning coffee *now*.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
-- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
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