Messages in this thread | | | Date | Tue, 15 Nov 2022 11:08:05 +0100 | From | Marco Felsch <> | Subject | Re: [PATCH V5 10/12] arm64: dts: imx8mn-evk: enable uart1 |
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On 22-11-15, Peng Fan (OSS) wrote: > From: Peng Fan <peng.fan@nxp.com> > > Enable uart1 for BT usage > Configure the clock to source from IMX8MN_SYS_PLL1_80M, because the uart > could only support max 1.5M buadrate if using OSC_24M as clock source. > > Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
> --- > arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi > index 1971f095e4c2..12dc5d398a03 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi > @@ -247,6 +247,15 @@ &spdif1 { > status = "okay"; > }; > > +&uart1 { /* BT */ > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_uart1>; > + assigned-clocks = <&clk IMX8MN_CLK_UART1>; > + assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_80M>; > + fsl,uart-has-rtscts; > + status = "okay"; > +}; > + > &uart2 { /* console */ > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_uart2>; > @@ -440,6 +449,15 @@ MX8MN_IOMUXC_SD1_STROBE_GPIO2_IO11 0x159 > >; > }; > > + pinctrl_uart1: uart1grp { > + fsl,pins = < > + MX8MN_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140 > + MX8MN_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140 > + MX8MN_IOMUXC_UART3_RXD_UART1_DCE_CTS_B 0x140 > + MX8MN_IOMUXC_UART3_TXD_UART1_DCE_RTS_B 0x140 > + >; > + }; > + > pinctrl_uart2: uart2grp { > fsl,pins = < > MX8MN_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140 > -- > 2.37.1 > > >
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