Messages in this thread | | | Date | Mon, 14 Nov 2022 21:01:25 +0100 | From | "Arnd Bergmann" <> | Subject | Re: [PATCH v12 09/17] riscv: Add ptrace vector support |
| |
On Tue, Nov 8, 2022, at 02:38, Vineet Gupta wrote: >> static const struct user_regset_view riscv_user_native_view = { >> diff --git a/include/uapi/linux/elf.h b/include/uapi/linux/elf.h >> index c7b056af9ef0..5a5056c6a2a1 100644 >> --- a/include/uapi/linux/elf.h >> +++ b/include/uapi/linux/elf.h >> @@ -439,6 +439,7 @@ typedef struct elf64_shdr { >> #define NT_MIPS_DSP 0x800 /* MIPS DSP ASE registers */ >> #define NT_MIPS_FP_MODE 0x801 /* MIPS floating-point mode */ >> #define NT_MIPS_MSA 0x802 /* MIPS SIMD registers */ >> +#define NT_RISCV_VECTOR 0x900 /* RISC-V vector registers */ >> #define NT_LOONGARCH_CPUCFG 0xa00 /* LoongArch CPU config registers */ >> #define NT_LOONGARCH_CSR 0xa01 /* LoongArch control and status registers */ >> #define NT_LOONGARCH_LSX 0xa02 /* LoongArch Loongson SIMD Extension registers */ > > I think we should break this one out as a seperate patch to be applied > independently, avoid merge conflicts (but this file doesn't change much > anyways. @Arnd or is it ok to carry with riscv change ?
I only saw this by accident, sorry for not replying earlier. Yes, please keep it in this patch and merge it through the riscv tree.
Arnd
| |