Messages in this thread | | | From | Anup Patel <> | Subject | [PATCH v11 0/7] RISC-V IPI Improvements | Date | Mon, 14 Nov 2022 15:08:57 +0530 |
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This series aims to improve IPI support in Linux RISC-V in following ways: 1) Treat IPIs as normal per-CPU interrupts instead of having custom RISC-V specific hooks. This also makes Linux RISC-V IPI support aligned with other architectures. 2) Remote TLB flushes and icache flushes should prefer local IPIs instead of SBI calls whenever we have specialized hardware (such as RISC-V AIA IMSIC and RISC-V SWI) which allows S-mode software to directly inject IPIs without any assistance from M-mode runtime firmware.
These patches were originally part of the "Linux RISC-V ACLINT Support" series but this now a separate series so that it can be merged independently of the "Linux RISC-V ACLINT Support" series. (Refer, https://lore.kernel.org/lkml/20211007123632.697666-1-anup.patel@wdc.com/)
These patches are also a preparatory patches for the up-coming: 1) Linux RISC-V AIA support 2) Linux RISC-V SWI support
These patches can also be found in riscv_ipi_imp_v11 branch at: https://github.com/avpatel/linux.git
Changes since v10: - Rebased on Linux-6.1-rc5 - Drop the "!(pending & ibit)" check in ipi_mux_send_mask() of PATCH3 - Disable local interrupts in ipi_mux_send_mask() of PATCH3 because we can be preempted while using a per-CPU temporary variable.
Changes since v9: - Rebased on Linux-6.1-rc3 - Updated header comment block of ipi-mux.c in PATCH3 - Use a struct for global data of ipi-mux.c in PATCH3 - Add per-CPU temp cpumask for sending IPIs in PATCH3 - Drop the use of fwspec in PATCH3 - Use static key for ipi_mux_pre_handle() and ipi_mux_post_handle() in PATCH3 - Remove redundant pr_warn_ratelimited() called by ipi_mux_process() in PATCH3 - Remove CPUHP thingy from ipi_mux_create() in PATCH3
Changes since v8: - Rebased on Linux-6.0-rc3 - Use dummy percpu data as parameter for request_percpu_irq() in PATCH4.
Changes since v7: - Rebased on Linux-6.0-rc1 - Use atomic operations to track per-CPU pending and enabled IPIs in PATCH3. (Note: this is inspired from IPI muxing implemented in drivers/irqchip/irq-apple-aic.c) - Made "struct ipi_mux_ops" (added by PATCH3) flexible so that drivers/irqchip/irq-apple-aic.c can adopt it in future.
Changes since v6: - Rebased on Linux-5.19-rc7 - Added documentation for struct ipi_mux_ops in PATCH3 - Dropped dummy irq_mask()/unmask() in PATCH3 - Added const for "ipi_mux_chip" in PATCH3 - Removed "type" initialization from ipi_mux_domain_alloc() in PATCH3 - Dropped translate() from "ipi_mux_domain_ops" in PATCH3 - Improved barrier documentation in ipi_mux_process() of PATCH3 - Added percpu check in ipi_mux_create() for parent_virq of PATCH3 - Added nr_ipi parameter in ipi_mux_create() of PATCH3
Changes since v5: - Rebased on Linux-5.18-rc3 - Used kernel doc style in PATCH3 - Removed redundant loop in ipi_mux_process() of PATCH3 - Removed "RISC-V" prefix form ipi_mux_chip.name of PATCH3 - Removed use of "this patch" in PATCH3 commit description - Addressed few other nit comments in PATCH3
Changes since v4: - Rebased on Linux-5.17 - Includes new PATCH3 which adds mechanism to multiplex a single HW IPI
Changes since v3: - Rebased on Linux-5.17-rc6 - Updated PATCH2 to not export riscv_set_intc_hwnode_fn() - Simplified riscv_intc_hwnode() in PATCH2
Changes since v2: - Rebased on Linux-5.17-rc4 - Updated PATCH2 to not create synthetic INTC fwnode and instead provide a function which allows drivers to directly discover INTC fwnode
Changes since v1: - Use synthetic fwnode for INTC instead of irq_set_default_host() in PATCH2
Anup Patel (7): RISC-V: Clear SIP bit only when using SBI IPI operations irqchip/riscv-intc: Allow drivers to directly discover INTC hwnode genirq: Add mechanism to multiplex a single HW IPI RISC-V: Treat IPIs as normal Linux IRQs RISC-V: Allow marking IPIs as suitable for remote FENCEs RISC-V: Use IPIs for remote TLB flush when possible RISC-V: Use IPIs for remote icache flush when possible
arch/riscv/Kconfig | 2 + arch/riscv/include/asm/irq.h | 4 + arch/riscv/include/asm/sbi.h | 7 + arch/riscv/include/asm/smp.h | 49 ++++-- arch/riscv/kernel/Makefile | 1 + arch/riscv/kernel/cpu-hotplug.c | 3 +- arch/riscv/kernel/irq.c | 21 ++- arch/riscv/kernel/sbi-ipi.c | 80 +++++++++ arch/riscv/kernel/sbi.c | 11 -- arch/riscv/kernel/smp.c | 166 +++++++++--------- arch/riscv/kernel/smpboot.c | 5 +- arch/riscv/mm/cacheflush.c | 5 +- arch/riscv/mm/tlbflush.c | 93 +++++++++-- drivers/clocksource/timer-clint.c | 43 +++-- drivers/irqchip/irq-riscv-intc.c | 60 +++---- include/linux/irq.h | 18 ++ kernel/irq/Kconfig | 5 + kernel/irq/Makefile | 1 + kernel/irq/ipi-mux.c | 268 ++++++++++++++++++++++++++++++ 19 files changed, 675 insertions(+), 167 deletions(-) create mode 100644 arch/riscv/kernel/sbi-ipi.c create mode 100644 kernel/irq/ipi-mux.c
-- 2.34.1
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