Messages in this thread | | | Subject | Re: [PATCH RESEND v6 1/1] clk: mstar: msc313 cpupll clk driver | From | Stephen Boyd <> | Date | Thu, 06 Oct 2022 10:44:31 -0700 |
| |
Quoting Romain Perier (2022-10-05 23:58:32) > Le jeu. 6 oct. 2022 à 01:02, Stephen Boyd <sboyd@kernel.org> a écrit : > > > > Quoting Romain Perier (2022-10-05 01:53:05) > > > From: Daniel Palmer <daniel@0x0f.com> > > > > > > Add a driver for the CPU pll/ARM pll/MIPS pll that is present > > > in MStar SoCs. > > > > > > Currently there is no documentation for this block so it's possible > > > this driver isn't entirely correct. > > > > > > Only tested on the version of this IP in the MStar/SigmaStar > > > ARMv7 SoCs. > > > > > > Signed-off-by: Daniel Palmer <daniel@0x0f.com> > > > Co-developed-by: Willy Tarreau <w@1wt.eu> > > > Signed-off-by: Willy Tarreau <w@1wt.eu> > > > > Missing Signed-off-by Romain. > > Signed-off-by: Romain Perier <romain.perier@gmail.com> > > > It is okay, like this ? >
Yes, please resend with that tag.
| |