Messages in this thread | | | Date | Mon, 31 Oct 2022 14:27:17 +0100 | From | Andrew Lunn <> | Subject | Re: [PATCH 5/5] net: stmmac: Add NXP S32 SoC family support |
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> + /* set interface mode */ > + if (gmac->ctrl_sts) { > + switch (gmac->intf_mode) { > + default: > + dev_info(&pdev->dev, "unsupported mode %u, set the default phy mode.\n", > + gmac->intf_mode);
If it is an unsupported mode use dev_err() and return -EINVAL;
> + fallthrough; > + case PHY_INTERFACE_MODE_SGMII: > + dev_info(&pdev->dev, "phy mode set to SGMII\n");
dev_dbg()
Please don't spam the lock with useless information.
> + intf_sel = PHY_INTF_SEL_SGMII; > + break; > + case PHY_INTERFACE_MODE_RGMII: > + case PHY_INTERFACE_MODE_RGMII_ID: > + case PHY_INTERFACE_MODE_RGMII_TXID: > + case PHY_INTERFACE_MODE_RGMII_RXID: > + dev_info(&pdev->dev, "phy mode set to RGMII\n");
dev_dbg()
> + intf_sel = PHY_INTF_SEL_RGMII; > + break; > + case PHY_INTERFACE_MODE_RMII: > + dev_info(&pdev->dev, "phy mode set to RMII\n");
dev_dbg()
> + intf_sel = PHY_INTF_SEL_RMII; > + break; > + case PHY_INTERFACE_MODE_MII: > + dev_info(&pdev->dev, "phy mode set to MII\n");
dev_dbg()
> + intf_sel = PHY_INTF_SEL_MII; > + break; > + } > + > + writel(intf_sel, gmac->ctrl_sts); > + } > + > + return 0; > +} > + > +static int s32cc_config_cache_coherency(struct platform_device *pdev, > + struct plat_stmmacenet_data *plat_dat) > +{ > + plat_dat->axi4_ace_ctrl = > + devm_kzalloc(&pdev->dev, > + sizeof(struct stmmac_axi4_ace_ctrl), > + GFP_KERNEL); > + > + if (!plat_dat->axi4_ace_ctrl) { > + dev_info(&pdev->dev, "Fail to allocate axi4_ace_ctrl\n");
dev_err(). But devm_kzalloc() failing will produce log messages, so you probably don't need this.
Andrew
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