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    Subject[PATCH 7/7] arm64: dts: fsd: Add support for error correction code for message RAM
    Date
    Add mram-ecc-cfg property which indicates the error correction code config
    and enable the same for FSD platform.

    In FSD, error correction code (ECC) is configured via PERIC SYSREG registers.

    Signed-off-by: Vivek Yadav <vivek.2311@samsung.com>
    ---
    arch/arm64/boot/dts/tesla/fsd.dtsi | 4 ++++
    1 file changed, 4 insertions(+)

    diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi
    index 154fd3fc5895..03d46a113612 100644
    --- a/arch/arm64/boot/dts/tesla/fsd.dtsi
    +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi
    @@ -778,6 +778,7 @@
    clocks = <&clock_peric PERIC_MCAN0_IPCLKPORT_PCLK>,
    <&clock_peric PERIC_MCAN0_IPCLKPORT_CCLK>;
    clock-names = "hclk", "cclk";
    + mram-ecc-cfg = <&sysreg_peric 0x700>;
    bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
    status = "disabled";
    };
    @@ -795,6 +796,7 @@
    clocks = <&clock_peric PERIC_MCAN1_IPCLKPORT_PCLK>,
    <&clock_peric PERIC_MCAN1_IPCLKPORT_CCLK>;
    clock-names = "hclk", "cclk";
    + mram-ecc-cfg = <&sysreg_peric 0x704>;
    bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
    status = "disabled";
    };
    @@ -812,6 +814,7 @@
    clocks = <&clock_peric PERIC_MCAN2_IPCLKPORT_PCLK>,
    <&clock_peric PERIC_MCAN2_IPCLKPORT_CCLK>;
    clock-names = "hclk", "cclk";
    + mram-ecc-cfg = <&sysreg_peric 0x708>;
    bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
    status = "disabled";
    };
    @@ -829,6 +832,7 @@
    clocks = <&clock_peric PERIC_MCAN3_IPCLKPORT_PCLK>,
    <&clock_peric PERIC_MCAN3_IPCLKPORT_CCLK>;
    clock-names = "hclk", "cclk";
    + mram-ecc-cfg = <&sysreg_peric 0x70c>;
    bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
    status = "disabled";
    };
    --
    2.17.1
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