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    Subject[PATCH 6.0 591/862] clk: vc5: Fix 5P49V6901 outputs disabling when enabling FOD
    Date
    From: Serge Semin <Sergey.Semin@baikalelectronics.ru>

    [ Upstream commit c388cc804016cf0f65afdc2362b120aa594ff3e6 ]

    We have discovered random glitches during the system boot up procedure.
    The problem investigation led us to the weird outcomes: when none of the
    Renesas 5P49V6901 ports are explicitly enabled by the kernel driver, the
    glitches disappeared. It was a mystery since the SoC external clock
    domains were fed with different 5P49V6901 outputs. The driver code didn't
    seem like bogus either. We almost despaired to find out a root cause when
    the solution has been found for a more modern revision of the chip. It
    turned out the 5P49V6901 clock generator stopped its output for a short
    period of time during the VC5_OUT_DIV_CONTROL register writing. The same
    problem was found for the 5P49V6965 revision of the chip and was
    successfully fixed in commit fc336ae622df ("clk: vc5: fix output disabling
    when enabling a FOD") by enabling the "bypass_sync" flag hidden inside
    "Unused Factory Reserved Register". Even though the 5P49V6901 registers
    description and programming guide doesn't provide any intel regarding that
    flag, setting it up anyway in the officially unused register completely
    eliminated the denoted glitches. Thus let's activate the functionality
    submitted in commit fc336ae622df ("clk: vc5: fix output disabling when
    enabling a FOD") for the Renesas 5P49V6901 chip too in order to remove the
    ports implicit inter-dependency.

    Fixes: dbf6b16f5683 ("clk: vc5: Add support for IDT VersaClock 5P49V6901")
    Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
    Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
    Link: https://lore.kernel.org/r/20220929225402.9696-2-Sergey.Semin@baikalelectronics.ru
    Signed-off-by: Stephen Boyd <sboyd@kernel.org>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/clk/clk-versaclock5.c | 2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)

    diff --git a/drivers/clk/clk-versaclock5.c b/drivers/clk/clk-versaclock5.c
    index e7be3e54b9be..03cfef494b49 100644
    --- a/drivers/clk/clk-versaclock5.c
    +++ b/drivers/clk/clk-versaclock5.c
    @@ -1204,7 +1204,7 @@ static const struct vc5_chip_info idt_5p49v6901_info = {
    .model = IDT_VC6_5P49V6901,
    .clk_fod_cnt = 4,
    .clk_out_cnt = 5,
    - .flags = VC5_HAS_PFD_FREQ_DBL,
    + .flags = VC5_HAS_PFD_FREQ_DBL | VC5_HAS_BYPASS_SYNC_BIT,
    };

    static const struct vc5_chip_info idt_5p49v6965_info = {
    --
    2.35.1


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