Messages in this thread | | | Date | Wed, 19 Oct 2022 10:21:23 +0200 | From | Michael Walle <> | Subject | Re: [PATCH v2 1/1] mtd: spi-nor: micron-st: Enable locking for n25q256ax1/mt25qu256a |
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Hi,
Am 2022-10-19 09:16, schrieb Eliav Farber: > n25q256ax1 [1] and mt25qu256a [2] (both have same jedec_id - 0x20bb19) > use the 4 bit Block Protection scheme and support Top/Bottom protection > via the BP and TB bits of the Status Register. > BP3 is located in bit 6 of the Status Register. > Tested on both n25q256ax1 and mt25qu256a. > > [1] > https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/n25q/n25q_256mb_3v.pdf > [2] > https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/mt25q/die-rev-a/mt25q_qljs_u_256_aba_0.pdf
If you respin, you can use a "Link:" tag for the URL above.
> Signed-off-by: Eliav Farber <farbere@amazon.com> > --- > xxd -p > /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp > 53464450060101ff00060110300000ff84000102800000ffffffffffffff > ffffffffffffffffffffffffffffffffffffe520fbffffffff0f29eb276b > 273b27bbffffffffffff27bbffff29eb0c2010d80f520000244a99008b8e > 03d4ac0127387a757a75fbbdd55c4a0f82ff81bd3d36ffffffffffffffff > ffffffffffffffffffe7ffff21dcffff > > md5sum > /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp > 5ea738216f68c9f98987bb3725699a32 > /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp > > cat > /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/jedec_id > 20bb19104400 > > cat > /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/partname > mt25qu256a > > cat > /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/manufacturer > st
That's the mt25qu256a SFDP. What about the n25q256ax1?
Thanks! -michael
> > v2 --> v1: > - Enable locking also for mt25qu256a. > - Dump the SFDP tables. > > drivers/mtd/spi-nor/micron-st.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/mtd/spi-nor/micron-st.c > b/drivers/mtd/spi-nor/micron-st.c > index 3c9681a3f7a3..f4d0153a5b1b 100644 > --- a/drivers/mtd/spi-nor/micron-st.c > +++ b/drivers/mtd/spi-nor/micron-st.c > @@ -201,11 +201,15 @@ static const struct flash_info st_nor_parts[] = { > MFR_FLAGS(USE_FSR) > }, > { "mt25qu256a", INFO6(0x20bb19, 0x104400, 64 * 1024, 512) > + FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | > + SPI_NOR_BP3_SR_BIT6) > NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) > FIXUP_FLAGS(SPI_NOR_4B_OPCODES) > MFR_FLAGS(USE_FSR) > }, > { "n25q256ax1", INFO(0x20bb19, 0, 64 * 1024, 512) > + FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | > + SPI_NOR_BP3_SR_BIT6) > NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) > MFR_FLAGS(USE_FSR) > },
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