Messages in this thread | | | Date | Mon, 17 Oct 2022 10:31:53 +0100 | From | Paul Cercueil <> | Subject | Re: [PATCH 7/8] serial: 8250/ingenic: Add support for the JZ4750/JZ4755 SoCs |
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Hi Siarhei,
Le dim., oct. 16 2022 at 21:39:48 +0300, Siarhei Volkau <lis8215@gmail.com> a écrit : > чт, 13 окт. 2022 г. в 21:56, Siarhei Volkau > <lis8215@gmail.com>: > >> > Just disable the divider in ingenic_fixup_fdt() in > >> I'll check that. > > I checked that approach: serial seems to be working as expected, > but not all the time: there's a time period when the CGU driver > started but serial console driver is still early one. > In my case UART produces garbage at that period since CGU > needs to enable clock divider back: ext is 24MHz but 12MHz > required for audio codec and USB to function properly.
What I'd do, is just force-enable it to 12 MHz in ingenic_fixup_fdt(), since the programming manual basically says that 24 MHz does not work properly.
Then in the earlycon setup code hardcode the /2 divider with a big fat comment about why it's there.
Cheers, -Paul
> So I think Arnd's approach: > >> the hardware should already be in a working state, >> with no need to touch it during early boot. > > shall resolve the problem, although I can't check it on all supported > hardware. > > BR, > Siarhei
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