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SubjectRe: [PATCH Part2 v6 12/49] crypto: ccp: Add support to initialize the AMD-SP for SEV-SNP
Some more follow up regarding avoiding the second IPI:

>>> +    rc = __sev_do_cmd_locked(SEV_CMD_SNP_INIT, NULL, error);
>>> +    if (rc)
>>> +        return rc;
>>> +
>>> +    /* Prepare for first SNP guest launch after INIT */
>>> +    wbinvd_on_all_cpus();
>> Can you put a wbinvd() in snp_set_hsave_pa() instead and save yourself
>> the second IPI?
>> Or is that order of the commands:
>>     1. clear MSR IPI
>>     2. SNP_INIT
>>     3. WBINVD IPI
>>     4. ...
>> mandatory?
> Yes, we need to do:
> wbinvd_on_all_cpus();
> Need to ensure all the caches are clear before launching the first guest
> and this has to be a combination of WBINVD and SNP_DF_FLUSH command.

I had related discussions with the HW architect:

SNP firmware will fail ACTIVATE if DFFLUSH isn't called, and DFFLUSH
requires the WBINVD on all cores. By requiring WBIDVD on all cores,
we're a) requiring the caches to be flushed, and b) forcing the
hypervisor to exit all guests at least once since SEV/SNP has been
enabled, since the WBINVDs must be done in host mode.

The order is:

so that means we can't combine the IPIs.

Also, this is not a performance critical path, so should we really be so
concerned about it?


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