Messages in this thread Patch in this message | | | From | Vidya Sagar <> | Subject | [PATCH V3 09/21] PCI: tegra194: Calibrate P2U for endpoint mode | Date | Fri, 14 Oct 2022 00:08:42 +0530 |
| |
Calibrate P2U for endpoint controller to request UPHY PLL rate change to Gen1 during initialization. This helps to reset stale PLL state from the previous bad link state.
Signed-off-by: Vidya Sagar <vidyas@nvidia.com> --- V3: * Reworded the commit message
V2: * None
drivers/pci/controller/dwc/pcie-tegra194.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c index dff38f73d9a7..910dc6c2154e 100644 --- a/drivers/pci/controller/dwc/pcie-tegra194.c +++ b/drivers/pci/controller/dwc/pcie-tegra194.c @@ -1130,6 +1130,9 @@ static int tegra_pcie_enable_phy(struct tegra_pcie_dw *pcie) ret = phy_power_on(pcie->phys[i]); if (ret < 0) goto phy_exit; + + if (pcie->of_data->mode == DW_PCIE_EP_TYPE) + phy_calibrate(pcie->phys[i]); } return 0; -- 2.17.1
| |