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    SubjectRe: [PATCH] mmc: sdhci-xenon: Fix 2G limitation on AC5 SoC
    Hi Robin,

    On Mon, 22 Aug 2022 11:06:43 +0100, Robin Murphy <robin.murphy@arm.com> wrote:
    > On 2022-08-21 07:17, Christoph Hellwig wrote:
    > > On Thu, Aug 18, 2022 at 03:07:40PM +0300, Vadym Kochan wrote:
    > >> It works with the following changes:
    > >>
    > >> #1 dma-ranges = <0x0 0x0 0x2 0x0 0x0 0x80000000>;
    > >>
    > >> #3 swiotlb="force"
    > >>
    > >> Is it OK to force the memory allocation from the start for the swiotlb ?
    > >
    > > It should be ok, but isn't really optimal.
    > >
    > > I wonder if we should just allow DT to specify the swiotlb buffer
    > > location. Basically have yet another RESERVEDMEM_OF_DECLARE variant
    > > for it, which shouldn't be all that much work except for figuring
    > > out the interaction with the various kernel command line options.
    >
    > We already have all the information we need in the DT (and ACPI), the
    > arm64 init code just needs to do a better job of interpreting it
    > properly. I'll see what I can come up with once I've finished what I'm
    > currently tied up in.
    >
    > Thanks,
    > Robin.

    Sorry to disturb you, I just 'd like to know if you have
    some ideas to share or patches to test ?

    Thank you!

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