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SubjectRe: [PATCH v4 3/4] clk: mediatek: Add new clock driver to handle FHCTL hardware
From
Il 13/10/22 13:23, Johnson Wang ha scritto:
> To implement frequency hopping and spread spectrum clocking
> function, we introduce new clock type and APIs to handle
> FHCTL hardware.
>
> Co-developed-by: Edward-JW Yang <edward-jw.yang@mediatek.com>
> Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.com>
> Signed-off-by: Johnson Wang <johnson.wang@mediatek.com>
> ---
> drivers/clk/mediatek/Kconfig | 7 +
> drivers/clk/mediatek/Makefile | 1 +
> drivers/clk/mediatek/clk-fhctl.c | 244 ++++++++++++++++++++++++++++
> drivers/clk/mediatek/clk-fhctl.h | 26 +++
> drivers/clk/mediatek/clk-pllfh.c | 268 +++++++++++++++++++++++++++++++
> drivers/clk/mediatek/clk-pllfh.h | 82 ++++++++++
> 6 files changed, 628 insertions(+)
> create mode 100644 drivers/clk/mediatek/clk-fhctl.c
> create mode 100644 drivers/clk/mediatek/clk-fhctl.h
> create mode 100644 drivers/clk/mediatek/clk-pllfh.c
> create mode 100644 drivers/clk/mediatek/clk-pllfh.h
>

..snip..

> diff --git a/drivers/clk/mediatek/clk-pllfh.c b/drivers/clk/mediatek/clk-pllfh.c
> new file mode 100644
> index 000000000000..a728ff749db1
> --- /dev/null
> +++ b/drivers/clk/mediatek/clk-pllfh.c
> @@ -0,0 +1,268 @@

..snip..

> +
> +int mtk_clk_register_pllfhs(struct device_node *node,
> + const struct mtk_pll_data *plls, int num_plls,
> + struct mtk_pllfh_data *pllfhs, int num_fhs,
> + struct clk_hw_onecell_data *clk_data)
> +{
> + void __iomem *base;
> + int i;
> + struct clk_hw *hw;
> +
> + base = of_iomap(node, 0);
> + if (!base) {
> + pr_err("%s(): ioremap failed\n", __func__);
> + return -EINVAL;
> + }
> +
> + for (i = 0; i < num_plls; i++) {
> + const struct mtk_pll_data *pll = &plls[i];
> + struct mtk_pllfh_data *pllfh;

bool use_fhctl;

pllfh = get_pllfh_by_id(pllfhs, num_fhs, pll->id);
use_fhctl = fhctl_is_supported_and_enabled(pllfh);

if (use_fhctl)
hw = mtk_clk_register_pllfh(pll, pllfh, base);
else
hw = mtk_clk_register_pll(pll, base);

if (IS_ERR(hw) {
pr_err("Failed to register %s clk %s: %d\n",
use_fhctl ? "fhpll" : "pll", pll->name,
PTR_ERR(hw));
goto err;
}

.... that's better.

> +
> + clk_data->hws[pll->id] = hw;
> + }
> +
> + return 0;
> +
> +err:
> + while (--i >= 0) {
> + const struct mtk_pll_data *pll = &plls[i];
> + struct mtk_pllfh_data *pllfh;
> +
> + pllfh = get_pllfh_by_id(pllfhs, num_fhs, pll->id);
> +
> + if (fhctl_is_supported_and_enabled(pllfh))
> + mtk_clk_unregister_pllfh(clk_data->hws[pll->id]);
> + else
> + mtk_clk_unregister_pll(clk_data->hws[pll->id]);
> +
> + clk_data->hws[pll->id] = ERR_PTR(-ENOENT);
> + }
> +
> + iounmap(base);
> +
> + return PTR_ERR(hw);
> +}
> +

..snip..

> diff --git a/drivers/clk/mediatek/clk-pllfh.h b/drivers/clk/mediatek/clk-pllfh.h
> new file mode 100644
> index 000000000000..effc7976c496
> --- /dev/null
> +++ b/drivers/clk/mediatek/clk-pllfh.h
> @@ -0,0 +1,82 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Copyright (c) 2022 MediaTek Inc.
> + * Author: Edward-JW Yang <edward-jw.yang@mediatek.com>
> + */
> +
> +#ifndef __DRV_CLKFH_H
> +#define __DRV_CLKFH_H
This should be __CLK_PLLFH_H.

...after which:

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

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