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SubjectRe: [PATCH RESEND] x86/devicetree: Add support for boot time interrupt mode config
Date
On 3/10/2022 5:08 pm, Rahul Tanwar wrote:
> Presently, init/boot time interrupt delivery mode is enumerated only
> for ACPI enabled systems by parsing MADT table or for older systems
> by parsing MP table. But for OF based x86 systems, it is assumed &
> fixed to legacy PIC mode.
>
> Add support for configuration of init time interrupt delivery mode
> for x86 OF based systems by introducing a new boolean property
> 'intel,no-imcr' for interrupt-controller node of local APIC. This
> property emulates IMCRP Bit 7 of MP feature info byte 2 of MP
> floating pointer structure.
>
> Defaults to legacy PIC mode if absent. Configures it to virtual wire
> compatibility mode if present.
>


Any comments or concerns for this patch? IMHO, this configurability of
pic_mode was missing for OF systems & it should benefit other x86 based
OF platforms as well. Please let me know if i am missing anything about
it or if you have other concerns.

Thanks,
Rahul


> Signed-off-by: Rahul Tanwar <rtanwar@maxlinear.com>
> ---
> arch/x86/kernel/devicetree.c | 10 +++++++++-
> 1 file changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/kernel/devicetree.c b/arch/x86/kernel/devicetree.c
> index 5cd51f25f446..de14015317f8 100644
> --- a/arch/x86/kernel/devicetree.c
> +++ b/arch/x86/kernel/devicetree.c
> @@ -167,7 +167,15 @@ static void __init dtb_lapic_setup(void)
> return;
> }
> smp_found_config = 1;
> - pic_mode = 1;
> + if (of_property_read_bool(dn, "intel,no-imcr")) {
> + pr_info(" Virtual Wire compatibility mode.\n");
> + pic_mode = 0;
> + }
> + else {
> + pr_info(" IMCR and PIC compatibility mode.\n");
> + pic_mode = 1;
> + }
> +
> register_lapic_address(lapic_addr);
> }
>



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