Messages in this thread | | | Date | Mon, 10 Oct 2022 17:59:34 -0700 | Subject | Re: [PATCH v2 0/6] Enable LKGS instruction | From | "H. Peter Anvin" <> |
| |
On 10/10/22 12:01, Xin Li wrote: > LKGS instruction is introduced with Intel FRED (flexible return and event > delivery) specification https://cdrdv2.intel.com/v1/dl/getContent/678938. > > LKGS is independent of FRED, so we enable it as a standalone CPU feature. > > LKGS behaves like the MOV to GS instruction except that it loads the base > address into the IA32_KERNEL_GS_BASE MSR instead of the GS segment’s > descriptor cache, which is exactly what Linux kernel does to load user level > GS base. Thus, with LKGS, there is no need to SWAPGS away from the kernel > GS base. > > Changes since V1: > * place fixup code into code section "__ex_table" instead of the obsoleted > "fixup" section. >
Correction: __ex_table is NOT a code section (scared me there for a second...). With the new fixup handling code EX_TYPE_ZERO_REG takes care of all the work, and there simply is no need for any fixup code at all (the exception fixup is fully data-driven.)
So I would say "use EX_TYPE_ZERO_REG instead of fixup code in the obsolete .fixup code section."
-hpa
| |