Messages in this thread Patch in this message | | | From | tianye@sugon ... | Subject | [PATCH] i2c: designware: slave should do WRITE_RECEIVED before SLAVE_STOP | Date | Mon, 10 Oct 2022 11:40:15 +0800 |
| |
From: Tian Ye <tianye@sugon.com>
Sometimes when designware slave receive 3byte in high speed mode: 0x1 STATUS SLAVE_ACTIVITY=0x1 : RAW_INTR_STAT=0x514 : INTR_STAT=0x4 I2C_SLAVE_WRITE_REQUESTED I2C_SLAVE_WRITE_RECEIVED 0x1 STATUS SLAVE_ACTIVITY=0 : RAW_INTR_STAT=0x714 : INTR_STAT=0x204 I2C_SLAVE_WRITE_RECEIVED I2C_SLAVE_STOP 0x1 STATUS SLAVE_ACTIVITY=0x1 : RAW_INTR_STAT=0x514 : INTR_STAT=0x4 I2C_SLAVE_WRITE_REQUESTED I2C_SLAVE_WRITE_RECEIVED
When second slave interrupt occus:slave rx fifo receive two bytes and stop interrupt occus at the same time.
Signed-off-by: Tian Ye <tianye@sugon.com> --- drivers/i2c/busses/i2c-designware-slave.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/i2c/busses/i2c-designware-slave.c b/drivers/i2c/busses/i2c-designware-slave.c index 0d15f4c1e9f7..801d84fa7e7d 100644 --- a/drivers/i2c/busses/i2c-designware-slave.c +++ b/drivers/i2c/busses/i2c-designware-slave.c @@ -158,6 +158,7 @@ static int i2c_dw_irq_handler_slave(struct dw_i2c_dev *dev) { u32 raw_stat, stat, enabled, tmp; u8 val = 0, slave_activity; + u32 rx_valid; regmap_read(dev->map, DW_IC_ENABLE, &enabled); regmap_read(dev->map, DW_IC_RAW_INTR_STAT, &raw_stat); @@ -179,11 +180,14 @@ static int i2c_dw_irq_handler_slave(struct dw_i2c_dev *dev) &val); } - regmap_read(dev->map, DW_IC_DATA_CMD, &tmp); - val = tmp; - if (!i2c_slave_event(dev->slave, I2C_SLAVE_WRITE_RECEIVED, - &val)) - dev_vdbg(dev->dev, "Byte %X acked!", val); + regmap_read(dev, DW_IC_RXFLR, &rx_valid); + for (; rx_valid > 0; rx_valid--) { + regmap_read(dev->map, DW_IC_DATA_CMD, &tmp); + val = tmp; + if (!i2c_slave_event(dev->slave, I2C_SLAVE_WRITE_RECEIVED, + &val)) + dev_vdbg(dev->dev, "Byte %X acked!", val); + } } if (stat & DW_IC_INTR_RD_REQ) { -- 2.25.1
| |