Messages in this thread Patch in this message | | | From | "Peng Fan (OSS)" <> | Subject | [PATCH 5/7] dt-bindings: mailbox: imx-mu: add i.MX8 SECO MU support | Date | Tue, 4 Jan 2022 14:25:45 +0800 |
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From: Peng Fan <peng.fan@nxp.com>
Similar to i.MX8QM/QXP SCU, i.MX8 SECO MU is dedicated for communication between SECO and Cortex-A cores from hardware design, it could not be reused for other purpose. To use SECO MU more effectivly, add "fsl,imx8-mu-seco" compatile to support fast IPC.
Signed-off-by: Peng Fan <peng.fan@nxp.com> --- Documentation/devicetree/bindings/mailbox/fsl,mu.yaml | 1 + 1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml index a337bcd80c4a..f865b806ae6a 100644 --- a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml +++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml @@ -28,6 +28,7 @@ properties: - const: fsl,imx7ulp-mu - const: fsl,imx8ulp-mu - const: fsl,imx8-mu-scu + - const: fsl,imx8-mu-seco - const: fsl,imx8ulp-mu-s4 - items: - enum: -- 2.25.1
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