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Subject[PATCH v1 5/7] riscv: Use asm/insn.h to generate plt entries
Date
This converts kernel/module-sections.c to use asm/insn.h to generate
the instructions in the plt entries.

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
---
arch/riscv/kernel/module-sections.c | 27 ++++-----------------------
1 file changed, 4 insertions(+), 23 deletions(-)

diff --git a/arch/riscv/kernel/module-sections.c b/arch/riscv/kernel/module-sections.c
index 39d4ac681c2a..cb73399c3603 100644
--- a/arch/riscv/kernel/module-sections.c
+++ b/arch/riscv/kernel/module-sections.c
@@ -9,6 +9,7 @@
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/moduleloader.h>
+#include <asm/insn.h>

struct got_entry {
unsigned long symbol_addr; /* the real variable address */
@@ -61,36 +62,16 @@ struct plt_entry {
u32 insn_jr; /* jr t1 */
};

-#define OPC_AUIPC 0x0017
-#define OPC_LD 0x3003
-#define OPC_JALR 0x0067
-#define REG_T0 0x5
-#define REG_T1 0x6
-
static struct plt_entry emit_plt_entry(unsigned long val,
unsigned long plt,
unsigned long got_plt)
{
- /*
- * U-Type encoding:
- * +------------+----------+----------+
- * | imm[31:12] | rd[11:7] | opc[6:0] |
- * +------------+----------+----------+
- *
- * I-Type encoding:
- * +------------+------------+--------+----------+----------+
- * | imm[31:20] | rs1[19:15] | funct3 | rd[11:7] | opc[6:0] |
- * +------------+------------+--------+----------+----------+
- *
- */
unsigned long offset = got_plt - plt;
- u32 hi20 = (offset + 0x800) & 0xfffff000;
- u32 lo12 = (offset - hi20);

return (struct plt_entry) {
- OPC_AUIPC | (REG_T0 << 7) | hi20,
- OPC_LD | (lo12 << 20) | (REG_T0 << 15) | (REG_T1 << 7),
- OPC_JALR | (REG_T1 << 15)
+ RISCV_INSN_AUIPC | RISCV_INSN_RD_T0 | riscv_insn_u_imm(offset + 0x800),
+ RISCV_INSN_LD | RISCV_INSN_RD_T1 | RISCV_INSN_RS1_T0 | riscv_insn_i_imm(offset),
+ RISCV_INSN_JALR | RISCV_INSN_RS1_T1,
};
}

--
2.35.1
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