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    Subject[v5 2/3] drm/msm/dsi: Add dsi phy tuning configuration support
    Date
    Add support for MSM DSI PHY tuning configuration. Current design is
    to support drive strength and drive level/amplitude tuning for
    10nm PHY version, but this can be extended to other PHY versions.

    Signed-off-by: Rajeev Nandan <quic_rajeevny@quicinc.com>
    Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
    ---

    Changes in v2:
    - New.
    - Split into generic code and 10nm-specific part (Dmitry Baryshkov)

    Changes in v3:
    - s/ops.tuning_cfg_init/ops.parse_dt_properties
    To parse phy version specific DT properties (Dmitry Baryshkov)
    - Address comments for phy tuning data structure (Dmitry Baryshkov)

    No change since v4

    drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 6 ++++++
    drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 4 ++++
    2 files changed, 10 insertions(+)

    diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
    index 8c65ef6..fcbca76 100644
    --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
    +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
    @@ -739,6 +739,12 @@ static int dsi_phy_driver_probe(struct platform_device *pdev)
    }
    }

    + if (phy->cfg->ops.parse_dt_properties) {
    + ret = phy->cfg->ops.parse_dt_properties(phy);
    + if (ret)
    + goto fail;
    + }
    +
    ret = dsi_phy_regulator_init(phy);
    if (ret)
    goto fail;
    diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
    index b91303a..9e08081 100644
    --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
    +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
    @@ -25,6 +25,7 @@ struct msm_dsi_phy_ops {
    void (*save_pll_state)(struct msm_dsi_phy *phy);
    int (*restore_pll_state)(struct msm_dsi_phy *phy);
    bool (*set_continuous_clock)(struct msm_dsi_phy *phy, bool enable);
    + int (*parse_dt_properties)(struct msm_dsi_phy *phy);
    };

    struct msm_dsi_phy_cfg {
    @@ -81,6 +82,8 @@ struct msm_dsi_dphy_timing {
    #define DSI_PIXEL_PLL_CLK 1
    #define NUM_PROVIDED_CLKS 2

    +#define DSI_LANE_MAX 5
    +
    struct msm_dsi_phy {
    struct platform_device *pdev;
    void __iomem *base;
    @@ -98,6 +101,7 @@ struct msm_dsi_phy {

    struct msm_dsi_dphy_timing timing;
    const struct msm_dsi_phy_cfg *cfg;
    + void *tuning_cfg;

    enum msm_dsi_phy_usecase usecase;
    bool regulator_ldo_mode;
    --
    2.7.4
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