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SubjectRe: [PATCH net-next v2 5/9] net: ethernet: mtk-star-emac: add clock pad selection for RMII
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On 1/27/22 9:58 AM, Biao Huang wrote:
> This patch add a new dts property named "mediatek,rmii-rxc" parsing
> in driver, which will configure MAC to select which pin the RMII reference
> clock is connected to, TXC or RXC.
>
> TXC pad is the default reference clock pin. If user wants to use RXC pad
> instead, add "mediatek,rmii-rxc" to corresponding device node.
>
> Signed-off-by: Biao Huang <biao.huang@mediatek.com>
> Signed-off-by: Yinghua Pan <ot_yinghua.pan@mediatek.com>
> ---
> drivers/net/ethernet/mediatek/mtk_star_emac.c | 19 +++++++++++++++++--
> 1 file changed, 17 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/ethernet/mediatek/mtk_star_emac.c b/drivers/net/ethernet/mediatek/mtk_star_emac.c
> index a3884beaa3fe..d69f75661e75 100644
> --- a/drivers/net/ethernet/mediatek/mtk_star_emac.c
> +++ b/drivers/net/ethernet/mediatek/mtk_star_emac.c
> @@ -189,6 +189,8 @@ static const char *const mtk_star_clk_names[] = { "core", "reg", "trans" };
> #define MTK_PERICFG_REG_NIC_CFG_CON_V2 0x0c10
> #define MTK_PERICFG_REG_NIC_CFG_CON_CFG_INTF GENMASK(3, 0)
> #define MTK_PERICFG_BIT_NIC_CFG_CON_RMII 1
> +#define MTK_PERICFG_BIT_NIC_CFG_CON_CLK BIT(0)
> +#define MTK_PERICFG_BIT_NIC_CFG_CON_CLK_V2 BIT(8)
>
> /* Represents the actual structure of descriptors used by the MAC. We can
> * reuse the same structure for both TX and RX - the layout is the same, only
> @@ -265,6 +267,7 @@ struct mtk_star_priv {
> int speed;
> int duplex;
> int pause;
> + bool rmii_rxc;
>
> const struct mtk_star_compat *compat_data;
>
> @@ -1528,6 +1531,8 @@ static int mtk_star_probe(struct platform_device *pdev)
> return -ENODEV;
> }
>
> + priv->rmii_rxc = of_property_read_bool(of_node, "mediatek,rmii-rxc");
> +
> if (priv->compat_data->set_interface_mode) {
> ret = priv->compat_data->set_interface_mode(ndev);
> if (ret) {
> @@ -1571,17 +1576,25 @@ static int mt8516_set_interface_mode(struct net_device *ndev)
> {
> struct mtk_star_priv *priv = netdev_priv(ndev);
> struct device *dev = mtk_star_get_dev(priv);
> - unsigned int intf_val;
> + unsigned int intf_val, ret, rmii_rxc;
>
> switch (priv->phy_intf) {
> case PHY_INTERFACE_MODE_RMII:
> intf_val = MTK_PERICFG_BIT_NIC_CFG_CON_RMII;
> + rmii_rxc = priv->rmii_rxc ? 0 : MTK_PERICFG_BIT_NIC_CFG_CON_CLK;
> break;
> default:
> dev_err(dev, "This interface not supported\n");
> return -EINVAL;
> }
>
> + ret = regmap_update_bits(priv->pericfg,
> + MTK_PERICFG_REG_NIC_CFG1_CON,
> + MTK_PERICFG_BIT_NIC_CFG_CON_CLK,
> + rmii_rxc);
> + if (ret)
> + return ret;
> +
> return regmap_update_bits(priv->pericfg,
> MTK_PERICFG_REG_NIC_CFG0_CON,
> MTK_PERICFG_REG_NIC_CFG_CON_CFG_INTF,
> @@ -1597,6 +1610,7 @@ static int mt8365_set_interface_mode(struct net_device *ndev)
> switch (priv->phy_intf) {
> case PHY_INTERFACE_MODE_RMII:
> intf_val = MTK_PERICFG_BIT_NIC_CFG_CON_RMII;
> + intf_val |= priv->rmii_rxc ? 0 : MTK_PERICFG_BIT_NIC_CFG_CON_CLK_V2;
> break;
> default:
> dev_err(dev, "This interface not supported\n");
> @@ -1605,7 +1619,8 @@ static int mt8365_set_interface_mode(struct net_device *ndev)
>
> return regmap_update_bits(priv->pericfg,
> MTK_PERICFG_REG_NIC_CFG_CON_V2,
> - MTK_PERICFG_REG_NIC_CFG_CON_CFG_INTF,
> + MTK_PERICFG_REG_NIC_CFG_CON_CFG_INTF |
> + MTK_PERICFG_BIT_NIC_CFG_CON_CLK_V2,
> intf_val);
> }
>
>

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>

Regards,
Macpaul Lin
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