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    SubjectRe: [PATCH 7/8] clk: qcom: gcc-sm8150: use runtime PM for the clock controller
    On Thu, 27 Jan 2022 at 01:19, Bhupesh Sharma <bhupesh.sharma@linaro.org> wrote:
    >
    > On sm8150 emac clk registers are powered up by the GDSC power
    > domain. Use runtime PM calls to make sure that required power domain is
    > powered on while we access clock controller's registers.
    >
    > Cc: Stephen Boyd <sboyd@kernel.org>
    > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
    > ---
    > drivers/clk/qcom/gcc-sm8150.c | 27 +++++++++++++++++++++++++--
    > 1 file changed, 25 insertions(+), 2 deletions(-)
    >
    > diff --git a/drivers/clk/qcom/gcc-sm8150.c b/drivers/clk/qcom/gcc-sm8150.c
    > index ada755ad55f7..2e71afed81fd 100644
    > --- a/drivers/clk/qcom/gcc-sm8150.c
    > +++ b/drivers/clk/qcom/gcc-sm8150.c
    > @@ -5,6 +5,7 @@
    > #include <linux/bitops.h>
    > #include <linux/err.h>
    > #include <linux/platform_device.h>
    > +#include <linux/pm_runtime.h>
    > #include <linux/module.h>
    > #include <linux/of.h>
    > #include <linux/of_device.h>
    > @@ -3792,19 +3793,41 @@ static const struct of_device_id gcc_sm8150_match_table[] = {
    > };
    > MODULE_DEVICE_TABLE(of, gcc_sm8150_match_table);
    >
    > +static void gcc_sm8150_pm_runtime_disable(void *data)
    > +{
    > + pm_runtime_disable(data);
    > +}
    > +
    > static int gcc_sm8150_probe(struct platform_device *pdev)
    > {
    > struct regmap *regmap;
    > + int ret;
    > +
    > + pm_runtime_enable(&pdev->dev);
    > +
    > + ret = devm_add_action_or_reset(&pdev->dev, gcc_sm8150_pm_runtime_disable, &pdev->dev);
    > + if (ret)
    > + return ret;

    Please use devm_pm_runtime_enable() instead.

    > +
    > + ret = pm_runtime_resume_and_get(&pdev->dev);
    > + if (ret)
    > + return ret;
    >
    > regmap = qcom_cc_map(pdev, &gcc_sm8150_desc);
    > - if (IS_ERR(regmap))
    > + if (IS_ERR(regmap)) {
    > + pm_runtime_put(&pdev->dev);
    > return PTR_ERR(regmap);
    > + }
    >
    > /* Disable the GPLL0 active input to NPU and GPU via MISC registers */
    > regmap_update_bits(regmap, 0x4d110, 0x3, 0x3);
    > regmap_update_bits(regmap, 0x71028, 0x3, 0x3);
    >
    > - return qcom_cc_really_probe(pdev, &gcc_sm8150_desc, regmap);
    > + ret = qcom_cc_really_probe(pdev, &gcc_sm8150_desc, regmap);
    > +
    > + pm_runtime_put(&pdev->dev);
    > +
    > + return ret;
    > }
    >
    > static struct platform_driver gcc_sm8150_driver = {
    > --
    > 2.34.1
    >


    --
    With best wishes
    Dmitry

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