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    Subject[PATCH 5.16 0081/1039] drm/rockchip: dsi: Reconfigure hardware on resume()
    Date
    From: Brian Norris <briannorris@chromium.org>

    commit e584cdc1549932f87a2707b56bc588cfac5d89e0 upstream.

    Since commit 43c2de1002d2 ("drm/rockchip: dsi: move all lane config except
    LCDC mux to bind()"), we perform most HW configuration in the bind()
    function. This configuration may be lost on suspend/resume, so we
    need to call it again. That may lead to errors like this after system
    suspend/resume:

    dw-mipi-dsi-rockchip ff968000.mipi: failed to write command FIFO
    panel-kingdisplay-kd097d04 ff960000.mipi.0: failed write init cmds: -110

    Tested on Acer Chromebook Tab 10 (RK3399 Gru-Scarlet).

    Note that early mailing list versions of this driver borrowed Rockchip's
    downstream/BSP solution, to do HW configuration in mode_set() (which
    *is* called at the appropriate pre-enable() times), but that was
    discarded along the way. I've avoided that still, because mode_set()
    documentation doesn't suggest this kind of purpose as far as I can tell.

    Fixes: 43c2de1002d2 ("drm/rockchip: dsi: move all lane config except LCDC mux to bind()")
    Cc: <stable@vger.kernel.org>
    Signed-off-by: Brian Norris <briannorris@chromium.org>
    Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
    Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
    Signed-off-by: Heiko Stuebner <heiko@sntech.de>
    Link: https://patchwork.freedesktop.org/patch/msgid/20210928143413.v3.2.I4e9d93aadb00b1ffc7d506e3186a25492bf0b732@changeid
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    ---
    drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c | 37 ++++++++++++++++++++++++
    1 file changed, 37 insertions(+)

    --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
    +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
    @@ -267,6 +267,8 @@ struct dw_mipi_dsi_rockchip {
    struct dw_mipi_dsi *dmd;
    const struct rockchip_dw_dsi_chip_data *cdata;
    struct dw_mipi_dsi_plat_data pdata;
    +
    + bool dsi_bound;
    };

    struct dphy_pll_parameter_map {
    @@ -963,6 +965,8 @@ static int dw_mipi_dsi_rockchip_bind(str
    goto out_pm_runtime;
    }

    + dsi->dsi_bound = true;
    +
    return 0;

    out_pm_runtime:
    @@ -982,6 +986,8 @@ static void dw_mipi_dsi_rockchip_unbind(
    if (dsi->is_slave)
    return;

    + dsi->dsi_bound = false;
    +
    dw_mipi_dsi_unbind(dsi->dmd);

    clk_disable_unprepare(dsi->pllref_clk);
    @@ -1276,6 +1282,36 @@ static const struct phy_ops dw_mipi_dsi_
    .exit = dw_mipi_dsi_dphy_exit,
    };

    +static int __maybe_unused dw_mipi_dsi_rockchip_resume(struct device *dev)
    +{
    + struct dw_mipi_dsi_rockchip *dsi = dev_get_drvdata(dev);
    + int ret;
    +
    + /*
    + * Re-configure DSI state, if we were previously initialized. We need
    + * to do this before rockchip_drm_drv tries to re-enable() any panels.
    + */
    + if (dsi->dsi_bound) {
    + ret = clk_prepare_enable(dsi->grf_clk);
    + if (ret) {
    + DRM_DEV_ERROR(dsi->dev, "Failed to enable grf_clk: %d\n", ret);
    + return ret;
    + }
    +
    + dw_mipi_dsi_rockchip_config(dsi);
    + if (dsi->slave)
    + dw_mipi_dsi_rockchip_config(dsi->slave);
    +
    + clk_disable_unprepare(dsi->grf_clk);
    + }
    +
    + return 0;
    +}
    +
    +static const struct dev_pm_ops dw_mipi_dsi_rockchip_pm_ops = {
    + SET_LATE_SYSTEM_SLEEP_PM_OPS(NULL, dw_mipi_dsi_rockchip_resume)
    +};
    +
    static int dw_mipi_dsi_rockchip_probe(struct platform_device *pdev)
    {
    struct device *dev = &pdev->dev;
    @@ -1593,6 +1629,7 @@ struct platform_driver dw_mipi_dsi_rockc
    .remove = dw_mipi_dsi_rockchip_remove,
    .driver = {
    .of_match_table = dw_mipi_dsi_rockchip_dt_ids,
    + .pm = &dw_mipi_dsi_rockchip_pm_ops,
    .name = "dw-mipi-dsi-rockchip",
    },
    };

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