lkml.org 
[lkml]   [2022]   [Jan]   [23]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: [PATCH net] bus: mhi: Add mru_default for Cinterion MV31-W
On Wed, Jan 19, 2022 at 06:25:19PM +0800, Slark Xiao wrote:
> For default mechanism, product would use default MRU 3500 if
> they didn't define it. But for Foxconn SDX55, there is a known
> issue which MRU 3500 would lead to data connection lost.
> So we align it with Qualcomm default MRU settings.
> We also validate it with Cinterion product and find it also
> works.
>
> Fixes: 87693e092bd0 ("bus: mhi: pci_generic: Add Cinterion MV31-W PCIe to MHI")
> Signed-off-by: Slark Xiao <slark_xiao@163.com>

Applied to mhi-next with slight commit message change.

Thanks,
Mani

> ---
> drivers/bus/mhi/pci_generic.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c
> index 3a258a677df8..79c16b2a52c7 100644
> --- a/drivers/bus/mhi/pci_generic.c
> +++ b/drivers/bus/mhi/pci_generic.c
> @@ -401,6 +401,7 @@ static const struct mhi_pci_dev_info mhi_mv31_info = {
> .config = &modem_mv31_config,
> .bar_num = MHI_PCI_DEFAULT_BAR_NUM,
> .dma_data_width = 32,
> + .mru_default = 32768,
> };
>
> static const struct mhi_channel_config mhi_sierra_em919x_channels[] = {
> --
> 2.25.1
>

\
 
 \ /
  Last update: 2022-01-23 18:53    [W:0.070 / U:0.232 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site