Messages in this thread | | | Date | Fri, 21 Jan 2022 08:29:50 +0900 | Subject | Re: | From | Damien Le Moal <> |
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On 2022/01/21 0:37, Vitaly Wool wrote: > Hey, > > On Thu, Jan 20, 2022 at 4:30 PM Myrtle Shah <gatecat@ds0.me> wrote: >> >> These are some initial patches to bugs I found attempting to >> get a XIP kernel working on hardware: >> - 32-bit VexRiscv processor >> - kernel in SPI flash, at 0x00200000 >> - 16MB of RAM at 0x10000000 >> - MMU enabled >> >> I still have some more debugging to do, but these at least >> get the kernel as far as initialising the MMU, and I would >> appreciate feedback if anyone else is working on RISC-V XIP. > > I'll try to support you as much as I can, unfortunately I don't have > any 32-bit RISC-V around so I was rather thinking of extending the > RISC-V XIP support to 64-bit non-MMU targets.
That would be great ! I am completing the buildroot patches for the K210. Got u-boot almost working for SD card boot too (fighting a problem with rootfs kernel mount on boot when using u-boot though).
> For now just please keep in mind that there might be some inherent > assumptions that a target is 64 bit. > > Best regards, > Vitaly > >> >> _______________________________________________ >> linux-riscv mailing list >> linux-riscv@lists.infradead.org >> http://lists.infradead.org/mailman/listinfo/linux-riscv > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv
-- Damien Le Moal Western Digital Research
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