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These are some initial patches to bugs I found attempting to
get a XIP kernel working on hardware:
- 32-bit VexRiscv processor
- kernel in SPI flash, at 0x00200000
- 16MB of RAM at 0x10000000
- MMU enabled

I still have some more debugging to do, but these at least
get the kernel as far as initialising the MMU, and I would
appreciate feedback if anyone else is working on RISC-V XIP.


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